159 		struct arm_ccn_component *source;  member
598 		struct arm_ccn_component *source =  in arm_ccn_pmu_event_destroy()  local
599 				ccn->dt.pmu_counters[hw->idx].source;  in arm_ccn_pmu_event_destroy()
604 			clear_bit(hw->config_base, source->xp.dt_cmp_mask);  in arm_ccn_pmu_event_destroy()
606 			clear_bit(hw->config_base, source->pmu_events_mask);  in arm_ccn_pmu_event_destroy()
610 	ccn->dt.pmu_counters[hw->idx].source = NULL;  in arm_ccn_pmu_event_destroy()
620 	struct arm_ccn_component *source;  in arm_ccn_pmu_event_init()  local
735 		source = &ccn->xp[node_xp];  in arm_ccn_pmu_event_init()
737 		source = &ccn->node[node_xp];  in arm_ccn_pmu_event_init()
738 	ccn->dt.pmu_counters[hw->idx].source = source;  in arm_ccn_pmu_event_init()
742 		bit = arm_ccn_pmu_alloc_bit(source->xp.dt_cmp_mask,  in arm_ccn_pmu_event_init()
745 		bit = arm_ccn_pmu_alloc_bit(source->pmu_events_mask,  in arm_ccn_pmu_event_init()
875 	struct arm_ccn_component *source =  in arm_ccn_pmu_xp_watchpoint_config()  local
876 			ccn->dt.pmu_counters[hw->idx].source;  in arm_ccn_pmu_xp_watchpoint_config()
887 	val = readl(source->base + CCN_XP_DT_INTERFACE_SEL);  in arm_ccn_pmu_xp_watchpoint_config()
900 	writel(val, source->base + CCN_XP_DT_INTERFACE_SEL);  in arm_ccn_pmu_xp_watchpoint_config()
903 	writel(cmp_l & 0xffffffff, source->base + CCN_XP_DT_CMP_VAL_L(wp));  in arm_ccn_pmu_xp_watchpoint_config()
905 			source->base + CCN_XP_DT_CMP_VAL_L(wp) + 4);  in arm_ccn_pmu_xp_watchpoint_config()
906 	writel(cmp_h & 0xffffffff, source->base + CCN_XP_DT_CMP_VAL_H(wp));  in arm_ccn_pmu_xp_watchpoint_config()
908 			source->base + CCN_XP_DT_CMP_VAL_H(wp) + 4);  in arm_ccn_pmu_xp_watchpoint_config()
911 	writel(mask_l & 0xffffffff, source->base + CCN_XP_DT_CMP_MASK_L(wp));  in arm_ccn_pmu_xp_watchpoint_config()
913 			source->base + CCN_XP_DT_CMP_MASK_L(wp) + 4);  in arm_ccn_pmu_xp_watchpoint_config()
914 	writel(mask_h & 0xffffffff, source->base + CCN_XP_DT_CMP_MASK_H(wp));  in arm_ccn_pmu_xp_watchpoint_config()
916 			source->base + CCN_XP_DT_CMP_MASK_H(wp) + 4);  in arm_ccn_pmu_xp_watchpoint_config()
923 	struct arm_ccn_component *source =  in arm_ccn_pmu_xp_event_config()  local
924 			ccn->dt.pmu_counters[hw->idx].source;  in arm_ccn_pmu_xp_event_config()
933 	val = readl(source->base + CCN_XP_PMU_EVENT_SEL);  in arm_ccn_pmu_xp_event_config()
937 	writel(val, source->base + CCN_XP_PMU_EVENT_SEL);  in arm_ccn_pmu_xp_event_config()
944 	struct arm_ccn_component *source =  in arm_ccn_pmu_node_event_config()  local
945 			ccn->dt.pmu_counters[hw->idx].source;  in arm_ccn_pmu_node_event_config()
969 	val = readl(source->base + CCN_HNF_PMU_EVENT_SEL);  in arm_ccn_pmu_node_event_config()
974 	writel(val, source->base + CCN_HNF_PMU_EVENT_SEL);  in arm_ccn_pmu_node_event_config()