Lines Matching refs:CCN_NUM_PMU_EVENT_COUNTERS
127 #define CCN_NUM_PMU_EVENT_COUNTERS 8 /* See DT.dbg_id.num_pmucntr */ macro
128 #define CCN_IDX_PMU_CYCLE_COUNTER CCN_NUM_PMU_EVENT_COUNTERS
131 #define CCN_IDX_MASK_ANY (CCN_NUM_PMU_EVENT_COUNTERS + 0)
132 #define CCN_IDX_MASK_EXACT (CCN_NUM_PMU_EVENT_COUNTERS + 1)
133 #define CCN_IDX_MASK_ORDER (CCN_NUM_PMU_EVENT_COUNTERS + 2)
134 #define CCN_IDX_MASK_OPCODE (CCN_NUM_PMU_EVENT_COUNTERS + 3)
157 DECLARE_BITMAP(pmu_counters_mask, CCN_NUM_PMU_EVENT_COUNTERS + 1);
161 } pmu_counters[CCN_NUM_PMU_EVENT_COUNTERS + 1];
165 } cmp_mask[CCN_NUM_PMU_EVENT_COUNTERS + CCN_NUM_PREDEFINED_MASKS];
728 CCN_NUM_PMU_EVENT_COUNTERS); in arm_ccn_pmu_event_init()
1049 BUILD_BUG_ON(CCN_IDX_PMU_CYCLE_COUNTER != CCN_NUM_PMU_EVENT_COUNTERS); in arm_ccn_pmu_overflow_handler()
1051 for (idx = 0; idx < CCN_NUM_PMU_EVENT_COUNTERS + 1; idx++) { in arm_ccn_pmu_overflow_handler()