69 	seq_printf(m, "HWID		0x%08x\n",  in rsxx_attr_pci_regs_show()
71 	seq_printf(m, "SCRATCH		0x%08x\n",  in rsxx_attr_pci_regs_show()
73 	seq_printf(m, "IER		0x%08x\n",  in rsxx_attr_pci_regs_show()
75 	seq_printf(m, "IPR		0x%08x\n",  in rsxx_attr_pci_regs_show()
77 	seq_printf(m, "CREG_CMD		0x%08x\n",  in rsxx_attr_pci_regs_show()
79 	seq_printf(m, "CREG_ADD		0x%08x\n",  in rsxx_attr_pci_regs_show()
81 	seq_printf(m, "CREG_CNT		0x%08x\n",  in rsxx_attr_pci_regs_show()
83 	seq_printf(m, "CREG_STAT	0x%08x\n",  in rsxx_attr_pci_regs_show()
85 	seq_printf(m, "CREG_DATA0	0x%08x\n",  in rsxx_attr_pci_regs_show()
87 	seq_printf(m, "CREG_DATA1	0x%08x\n",  in rsxx_attr_pci_regs_show()
89 	seq_printf(m, "CREG_DATA2	0x%08x\n",  in rsxx_attr_pci_regs_show()
91 	seq_printf(m, "CREG_DATA3	0x%08x\n",  in rsxx_attr_pci_regs_show()
93 	seq_printf(m, "CREG_DATA4	0x%08x\n",  in rsxx_attr_pci_regs_show()
95 	seq_printf(m, "CREG_DATA5	0x%08x\n",  in rsxx_attr_pci_regs_show()
97 	seq_printf(m, "CREG_DATA6	0x%08x\n",  in rsxx_attr_pci_regs_show()
99 	seq_printf(m, "CREG_DATA7	0x%08x\n",  in rsxx_attr_pci_regs_show()
101 	seq_printf(m, "INTR_COAL	0x%08x\n",  in rsxx_attr_pci_regs_show()
103 	seq_printf(m, "HW_ERROR		0x%08x\n",  in rsxx_attr_pci_regs_show()
105 	seq_printf(m, "DEBUG0		0x%08x\n",  in rsxx_attr_pci_regs_show()
107 	seq_printf(m, "DEBUG1		0x%08x\n",  in rsxx_attr_pci_regs_show()
109 	seq_printf(m, "DEBUG2		0x%08x\n",  in rsxx_attr_pci_regs_show()
111 	seq_printf(m, "DEBUG3		0x%08x\n",  in rsxx_attr_pci_regs_show()
113 	seq_printf(m, "DEBUG4		0x%08x\n",  in rsxx_attr_pci_regs_show()
115 	seq_printf(m, "DEBUG5		0x%08x\n",  in rsxx_attr_pci_regs_show()
117 	seq_printf(m, "DEBUG6		0x%08x\n",  in rsxx_attr_pci_regs_show()
119 	seq_printf(m, "DEBUG7		0x%08x\n",  in rsxx_attr_pci_regs_show()
121 	seq_printf(m, "RECONFIG		0x%08x\n",  in rsxx_attr_pci_regs_show()
133 		seq_printf(m, "Ctrl %d CRC Errors	= %d\n",  in rsxx_attr_stats_show()
135 		seq_printf(m, "Ctrl %d Hard Errors	= %d\n",  in rsxx_attr_stats_show()
137 		seq_printf(m, "Ctrl %d Soft Errors	= %d\n",  in rsxx_attr_stats_show()
139 		seq_printf(m, "Ctrl %d Writes Issued	= %d\n",  in rsxx_attr_stats_show()
141 		seq_printf(m, "Ctrl %d Writes Failed	= %d\n",  in rsxx_attr_stats_show()
143 		seq_printf(m, "Ctrl %d Reads Issued	= %d\n",  in rsxx_attr_stats_show()
145 		seq_printf(m, "Ctrl %d Reads Failed	= %d\n",  in rsxx_attr_stats_show()
147 		seq_printf(m, "Ctrl %d Reads Retried	= %d\n",  in rsxx_attr_stats_show()
149 		seq_printf(m, "Ctrl %d Discards Issued	= %d\n",  in rsxx_attr_stats_show()
151 		seq_printf(m, "Ctrl %d Discards Failed	= %d\n",  in rsxx_attr_stats_show()
153 		seq_printf(m, "Ctrl %d DMA SW Errors	= %d\n",  in rsxx_attr_stats_show()
155 		seq_printf(m, "Ctrl %d DMA HW Faults	= %d\n",  in rsxx_attr_stats_show()
157 		seq_printf(m, "Ctrl %d DMAs Cancelled	= %d\n",  in rsxx_attr_stats_show()
159 		seq_printf(m, "Ctrl %d SW Queue Depth	= %d\n",  in rsxx_attr_stats_show()
161 		seq_printf(m, "Ctrl %d HW Queue Depth	= %d\n",  in rsxx_attr_stats_show()