Lines Matching refs:mmio
608 void __iomem *mmio = pp->ctl_block; in nv_adma_register_mode() local
615 status = readw(mmio + NV_ADMA_STAT); in nv_adma_register_mode()
618 status = readw(mmio + NV_ADMA_STAT); in nv_adma_register_mode()
625 tmp = readw(mmio + NV_ADMA_CTL); in nv_adma_register_mode()
626 writew(tmp & ~NV_ADMA_CTL_GO, mmio + NV_ADMA_CTL); in nv_adma_register_mode()
629 status = readw(mmio + NV_ADMA_STAT); in nv_adma_register_mode()
632 status = readw(mmio + NV_ADMA_STAT); in nv_adma_register_mode()
646 void __iomem *mmio = pp->ctl_block; in nv_adma_mode() local
655 tmp = readw(mmio + NV_ADMA_CTL); in nv_adma_mode()
656 writew(tmp | NV_ADMA_CTL_GO, mmio + NV_ADMA_CTL); in nv_adma_mode()
658 status = readw(mmio + NV_ADMA_STAT); in nv_adma_mode()
662 status = readw(mmio + NV_ADMA_STAT); in nv_adma_mode()
915 void __iomem *mmio = pp->ctl_block; in nv_adma_interrupt() local
943 notifier = readl(mmio + NV_ADMA_NOTIFIER); in nv_adma_interrupt()
944 notifier_error = readl(mmio + NV_ADMA_NOTIFIER_ERROR); in nv_adma_interrupt()
954 status = readw(mmio + NV_ADMA_STAT); in nv_adma_interrupt()
962 writew(status, mmio + NV_ADMA_STAT); in nv_adma_interrupt()
963 readw(mmio + NV_ADMA_STAT); /* flush posted write */ in nv_adma_interrupt()
1043 void __iomem *mmio = pp->ctl_block; in nv_adma_freeze() local
1056 tmp = readw(mmio + NV_ADMA_CTL); in nv_adma_freeze()
1058 mmio + NV_ADMA_CTL); in nv_adma_freeze()
1059 readw(mmio + NV_ADMA_CTL); /* flush posted write */ in nv_adma_freeze()
1065 void __iomem *mmio = pp->ctl_block; in nv_adma_thaw() local
1074 tmp = readw(mmio + NV_ADMA_CTL); in nv_adma_thaw()
1076 mmio + NV_ADMA_CTL); in nv_adma_thaw()
1077 readw(mmio + NV_ADMA_CTL); /* flush posted write */ in nv_adma_thaw()
1083 void __iomem *mmio = pp->ctl_block; in nv_adma_irq_clear() local
1096 writew(0xffff, mmio + NV_ADMA_STAT); in nv_adma_irq_clear()
1128 void __iomem *mmio; in nv_adma_port_start() local
1152 mmio = ap->host->iomap[NV_MMIO_BAR] + NV_ADMA_PORT + in nv_adma_port_start()
1154 pp->ctl_block = mmio; in nv_adma_port_start()
1182 writel(mem_dma & 0xFFFFFFFF, mmio + NV_ADMA_CPB_BASE_LOW); in nv_adma_port_start()
1183 writel((mem_dma >> 16) >> 16, mmio + NV_ADMA_CPB_BASE_HIGH); in nv_adma_port_start()
1197 writew(0xffff, mmio + NV_ADMA_STAT); in nv_adma_port_start()
1203 writew(0, mmio + NV_ADMA_CPB_COUNT); in nv_adma_port_start()
1206 tmp = readw(mmio + NV_ADMA_CTL); in nv_adma_port_start()
1208 NV_ADMA_CTL_HOTPLUG_IEN, mmio + NV_ADMA_CTL); in nv_adma_port_start()
1210 tmp = readw(mmio + NV_ADMA_CTL); in nv_adma_port_start()
1211 writew(tmp | NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); in nv_adma_port_start()
1212 readw(mmio + NV_ADMA_CTL); /* flush posted write */ in nv_adma_port_start()
1214 writew(tmp & ~NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); in nv_adma_port_start()
1215 readw(mmio + NV_ADMA_CTL); /* flush posted write */ in nv_adma_port_start()
1223 void __iomem *mmio = pp->ctl_block; in nv_adma_port_stop() local
1226 writew(0, mmio + NV_ADMA_CTL); in nv_adma_port_stop()
1233 void __iomem *mmio = pp->ctl_block; in nv_adma_port_suspend() local
1239 writew(0, mmio + NV_ADMA_CPB_COUNT); in nv_adma_port_suspend()
1242 writew(0, mmio + NV_ADMA_CTL); in nv_adma_port_suspend()
1250 void __iomem *mmio = pp->ctl_block; in nv_adma_port_resume() local
1254 writel(pp->cpb_dma & 0xFFFFFFFF, mmio + NV_ADMA_CPB_BASE_LOW); in nv_adma_port_resume()
1255 writel((pp->cpb_dma >> 16) >> 16, mmio + NV_ADMA_CPB_BASE_HIGH); in nv_adma_port_resume()
1258 writew(0xffff, mmio + NV_ADMA_STAT); in nv_adma_port_resume()
1264 writew(0, mmio + NV_ADMA_CPB_COUNT); in nv_adma_port_resume()
1267 tmp = readw(mmio + NV_ADMA_CTL); in nv_adma_port_resume()
1269 NV_ADMA_CTL_HOTPLUG_IEN, mmio + NV_ADMA_CTL); in nv_adma_port_resume()
1271 tmp = readw(mmio + NV_ADMA_CTL); in nv_adma_port_resume()
1272 writew(tmp | NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); in nv_adma_port_resume()
1273 readw(mmio + NV_ADMA_CTL); /* flush posted write */ in nv_adma_port_resume()
1275 writew(tmp & ~NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); in nv_adma_port_resume()
1276 readw(mmio + NV_ADMA_CTL); /* flush posted write */ in nv_adma_port_resume()
1284 void __iomem *mmio = ap->host->iomap[NV_MMIO_BAR]; in nv_adma_setup_port() local
1289 mmio += NV_ADMA_PORT + ap->port_no * NV_ADMA_PORT_SIZE; in nv_adma_setup_port()
1291 ioport->cmd_addr = mmio; in nv_adma_setup_port()
1292 ioport->data_addr = mmio + (ATA_REG_DATA * 4); in nv_adma_setup_port()
1294 ioport->feature_addr = mmio + (ATA_REG_ERR * 4); in nv_adma_setup_port()
1295 ioport->nsect_addr = mmio + (ATA_REG_NSECT * 4); in nv_adma_setup_port()
1296 ioport->lbal_addr = mmio + (ATA_REG_LBAL * 4); in nv_adma_setup_port()
1297 ioport->lbam_addr = mmio + (ATA_REG_LBAM * 4); in nv_adma_setup_port()
1298 ioport->lbah_addr = mmio + (ATA_REG_LBAH * 4); in nv_adma_setup_port()
1299 ioport->device_addr = mmio + (ATA_REG_DEVICE * 4); in nv_adma_setup_port()
1301 ioport->command_addr = mmio + (ATA_REG_STATUS * 4); in nv_adma_setup_port()
1303 ioport->ctl_addr = mmio + 0x20; in nv_adma_setup_port()
1434 void __iomem *mmio = pp->ctl_block; in nv_adma_qc_issue() local
1469 writew(qc->tag, mmio + NV_ADMA_APPEND); in nv_adma_qc_issue()
1674 void __iomem *mmio = pp->ctl_block; in nv_adma_error_handler() local
1679 u32 notifier = readl(mmio + NV_ADMA_NOTIFIER); in nv_adma_error_handler()
1680 u32 notifier_error = readl(mmio + NV_ADMA_NOTIFIER_ERROR); in nv_adma_error_handler()
1682 u32 status = readw(mmio + NV_ADMA_STAT); in nv_adma_error_handler()
1683 u8 cpb_count = readb(mmio + NV_ADMA_CPB_COUNT); in nv_adma_error_handler()
1684 u8 next_cpb_idx = readb(mmio + NV_ADMA_NEXT_CPB_IDX); in nv_adma_error_handler()
1712 writew(0, mmio + NV_ADMA_CPB_COUNT); in nv_adma_error_handler()
1715 tmp = readw(mmio + NV_ADMA_CTL); in nv_adma_error_handler()
1716 writew(tmp | NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); in nv_adma_error_handler()
1717 readw(mmio + NV_ADMA_CTL); /* flush posted write */ in nv_adma_error_handler()
1719 writew(tmp & ~NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); in nv_adma_error_handler()
1720 readw(mmio + NV_ADMA_CTL); /* flush posted write */ in nv_adma_error_handler()
1854 void __iomem *mmio = ap->host->iomap[NV_MMIO_BAR]; in nv_swncq_port_suspend() local
1858 writel(~0, mmio + NV_INT_STATUS_MCP55); in nv_swncq_port_suspend()
1861 writel(0, mmio + NV_INT_ENABLE_MCP55); in nv_swncq_port_suspend()
1864 tmp = readl(mmio + NV_CTL_MCP55); in nv_swncq_port_suspend()
1866 writel(tmp, mmio + NV_CTL_MCP55); in nv_swncq_port_suspend()
1873 void __iomem *mmio = ap->host->iomap[NV_MMIO_BAR]; in nv_swncq_port_resume() local
1877 writel(~0, mmio + NV_INT_STATUS_MCP55); in nv_swncq_port_resume()
1880 writel(0x00fd00fd, mmio + NV_INT_ENABLE_MCP55); in nv_swncq_port_resume()
1883 tmp = readl(mmio + NV_CTL_MCP55); in nv_swncq_port_resume()
1884 writel(tmp | NV_CTL_PRI_SWNCQ | NV_CTL_SEC_SWNCQ, mmio + NV_CTL_MCP55); in nv_swncq_port_resume()
1893 void __iomem *mmio = host->iomap[NV_MMIO_BAR]; in nv_swncq_host_init() local
1903 tmp = readl(mmio + NV_CTL_MCP55); in nv_swncq_host_init()
1905 writel(tmp | NV_CTL_PRI_SWNCQ | NV_CTL_SEC_SWNCQ, mmio + NV_CTL_MCP55); in nv_swncq_host_init()
1908 tmp = readl(mmio + NV_INT_ENABLE_MCP55); in nv_swncq_host_init()
1910 writel(tmp | 0x00fd00fd, mmio + NV_INT_ENABLE_MCP55); in nv_swncq_host_init()
1913 writel(~0x0, mmio + NV_INT_STATUS_MCP55); in nv_swncq_host_init()
1965 void __iomem *mmio = ap->host->iomap[NV_MMIO_BAR]; in nv_swncq_port_start() local
1986 pp->irq_block = mmio + NV_INT_STATUS_MCP55 + ap->port_no * 2; in nv_swncq_port_start()
1987 pp->tag_block = mmio + NV_NCQ_REG_MCP55 + ap->port_no * 2; in nv_swncq_port_start()