265 static void inic_reset_port(void __iomem *port_base)  in inic_reset_port()  argument
267 	void __iomem *idma_ctl = port_base + PORT_IDMA_CTL;  in inic_reset_port()
282 	writeb(0xff, port_base + PORT_IRQ_STAT);  in inic_reset_port()
313 	void __iomem *port_base = inic_port_base(ap);  in inic_stop_idma()  local
315 	readb(port_base + PORT_RPQ_FIFO);  in inic_stop_idma()
316 	readb(port_base + PORT_RPQ_CNT);  in inic_stop_idma()
317 	writew(0, port_base + PORT_IDMA_CTL);  in inic_stop_idma()
378 	void __iomem *port_base = inic_port_base(ap);  in inic_host_intr()  local
384 	irq_stat = readb(port_base + PORT_IRQ_STAT);  in inic_host_intr()
385 	writeb(irq_stat, port_base + PORT_IRQ_STAT);  in inic_host_intr()
386 	idma_stat = readw(port_base + PORT_IDMA_STAT);  in inic_host_intr()
400 		if (unlikely(readb(port_base + PORT_TF_COMMAND) &  in inic_host_intr()
540 	void __iomem *port_base = inic_port_base(ap);  in inic_qc_issue()  local
543 	writew(HCTL_FTHD0 | HCTL_LEDEN, port_base + HOST_CTL);  in inic_qc_issue()
544 	writew(IDMA_CTL_GO, port_base + PORT_IDMA_CTL);  in inic_qc_issue()
545 	writeb(0, port_base + PORT_CPB_PTQFIFO);  in inic_qc_issue()
552 	void __iomem *port_base = inic_port_base(ap);  in inic_tf_read()  local
554 	tf->feature	= readb(port_base + PORT_TF_FEATURE);  in inic_tf_read()
555 	tf->nsect	= readb(port_base + PORT_TF_NSECT);  in inic_tf_read()
556 	tf->lbal	= readb(port_base + PORT_TF_LBAL);  in inic_tf_read()
557 	tf->lbam	= readb(port_base + PORT_TF_LBAM);  in inic_tf_read()
558 	tf->lbah	= readb(port_base + PORT_TF_LBAH);  in inic_tf_read()
559 	tf->device	= readb(port_base + PORT_TF_DEVICE);  in inic_tf_read()
560 	tf->command	= readb(port_base + PORT_TF_COMMAND);  in inic_tf_read()
587 	void __iomem *port_base = inic_port_base(ap);  in inic_freeze()  local
589 	writeb(PIRQ_MASK_FREEZE, port_base + PORT_IRQ_MASK);  in inic_freeze()
590 	writeb(0xff, port_base + PORT_IRQ_STAT);  in inic_freeze()
595 	void __iomem *port_base = inic_port_base(ap);  in inic_thaw()  local
597 	writeb(0xff, port_base + PORT_IRQ_STAT);  in inic_thaw()
598 	writeb(PIRQ_MASK_DEFAULT, port_base + PORT_IRQ_MASK);  in inic_thaw()
603 	void __iomem *port_base = inic_port_base(link->ap);  in inic_check_ready()  local
605 	return ata_check_ready(readb(port_base + PORT_TF_COMMAND));  in inic_check_ready()
616 	void __iomem *port_base = inic_port_base(ap);  in inic_hardreset()  local
617 	void __iomem *idma_ctl = port_base + PORT_IDMA_CTL;  in inic_hardreset()
622 	inic_reset_port(port_base);  in inic_hardreset()
660 	void __iomem *port_base = inic_port_base(ap);  in inic_error_handler()  local
662 	inic_reset_port(port_base);  in inic_error_handler()
675 	void __iomem *port_base = inic_port_base(ap);  in init_port()  local
683 	writel(pp->cpb_tbl_dma, port_base + PORT_CPB_CPBLAR);  in init_port()
773 		void __iomem *port_base = mmio_base + i * PORT_SIZE;  in init_controller()  local
775 		writeb(0xff, port_base + PORT_IRQ_MASK);  in init_controller()
776 		inic_reset_port(port_base);  in init_controller()