Lines Matching refs:a7
171 s32i a7, a2, PT_AREG7
204 rsr a7, epc1 # load exception address
206 and a3, a3, a7 # mask lower bits
211 __ssa8 a7
250 addi a7, a7, 2 # increment PC (assume 16-bit insn)
255 addi a7, a7, 1
257 addi a7, a7, 3
331 l32i a7, a2, PT_AREG7
347 1: # a7: instruction pointer, a4: instruction, a3: value
352 addi a7, a7, 2 # incr. PC,assume 16-bit instruction
358 addi a7, a7, 1 # increment PC, 32-bit instruction
360 addi a7, a7, 3 # increment PC, 32-bit instruction
414 bne a7, a4, 1f
418 rsr a7, lbeg # set PC to LBEGIN
422 1: wsr a7, epc1 # skip emulated instruction
439 l32i a7, a2, PT_AREG7
460 l32i a7, a2, PT_AREG7