Lines Matching refs:a4
168 s32i a4, a2, PT_AREG4
179 movi a4, fast_unaligned_fixup
180 s32i a4, a3, EXC_TABLE_FIXUP
208 l32i a4, a3, 0 # load 2 words
212 __src_b a4, a4, a5 # a4 has the instruction
216 extui a5, a4, INSN_OP0, 4 # get insn.op0 nibble
224 _bbci.l a4, OP1_SI_BIT + INSN_OP1, .Lload
229 extui a6, a4, INSN_T, 4 # get source register
252 extui a5, a4, INSN_OP0, 4
260 extui a5, a4, INSN_OP1, 4
276 extui a4, a4, INSN_T, 4 # extract target register
278 addx8 a4, a4, a5
279 jx a4 # jump to entry for target register
324 movi a4, 0
326 s32i a4, a3, EXC_TABLE_FIXUP
334 l32i a4, a2, PT_AREG4
347 1: # a7: instruction pointer, a4: instruction, a3: value
354 extui a5, a4, INSN_OP0, 4 # extract OP0
363 extui a5, a4, INSN_OP1, 4 # extract OP1
374 movi a4, ~3
375 and a4, a4, a8 # align memory address
381 addi a4, a4, 8
388 l32e a5, a4, -8
390 l32i a5, a4, 0 # load lower address word
396 s32e a5, a4, -8
397 l32e a8, a4, -4
399 s32i a5, a4, 0 # store
400 l32i a8, a4, 4 # same for upper address word
406 s32e a6, a4, -4
408 s32i a6, a4, 4
413 rsr a4, lend # check if we reached LEND
414 bne a7, a4, 1f
415 rsr a4, lcount # and LCOUNT != 0
416 beqz a4, 1f
417 addi a4, a4, -1 # decrement LCOUNT and set
419 wsr a4, lcount
425 rsr a4, icountlevel
426 beqz a4, 1f
427 bgeui a4, LOCKLEVEL + 1, 1f
428 rsr a4, icount
429 addi a4, a4, 1
430 wsr a4, icount
432 movi a4, 0
434 s32i a4, a3, EXC_TABLE_FIXUP
442 l32i a4, a2, PT_AREG4
463 l32i a4, a2, PT_AREG4