51 static void __save_processor_state(struct saved_context *ctxt)  in __save_processor_state()  argument
62 	store_idt(&ctxt->idt);  in __save_processor_state()
65 	store_idt((struct desc_ptr *)&ctxt->idt_limit);  in __save_processor_state()
73 	ctxt->gdt_desc.size = GDT_SIZE - 1;  in __save_processor_state()
74 	ctxt->gdt_desc.address = (unsigned long)get_cpu_gdt_table(smp_processor_id());  in __save_processor_state()
76 	store_tr(ctxt->tr);  in __save_processor_state()
83 	savesegment(es, ctxt->es);  in __save_processor_state()
84 	savesegment(fs, ctxt->fs);  in __save_processor_state()
85 	savesegment(gs, ctxt->gs);  in __save_processor_state()
86 	savesegment(ss, ctxt->ss);  in __save_processor_state()
89 	asm volatile ("movw %%ds, %0" : "=m" (ctxt->ds));  in __save_processor_state()
90 	asm volatile ("movw %%es, %0" : "=m" (ctxt->es));  in __save_processor_state()
91 	asm volatile ("movw %%fs, %0" : "=m" (ctxt->fs));  in __save_processor_state()
92 	asm volatile ("movw %%gs, %0" : "=m" (ctxt->gs));  in __save_processor_state()
93 	asm volatile ("movw %%ss, %0" : "=m" (ctxt->ss));  in __save_processor_state()
95 	rdmsrl(MSR_FS_BASE, ctxt->fs_base);  in __save_processor_state()
96 	rdmsrl(MSR_GS_BASE, ctxt->gs_base);  in __save_processor_state()
97 	rdmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base);  in __save_processor_state()
100 	rdmsrl(MSR_EFER, ctxt->efer);  in __save_processor_state()
106 	ctxt->cr0 = read_cr0();  in __save_processor_state()
107 	ctxt->cr2 = read_cr2();  in __save_processor_state()
108 	ctxt->cr3 = read_cr3();  in __save_processor_state()
109 	ctxt->cr4 = __read_cr4_safe();  in __save_processor_state()
111 	ctxt->cr8 = read_cr8();  in __save_processor_state()
113 	ctxt->misc_enable_saved = !rdmsrl_safe(MSR_IA32_MISC_ENABLE,  in __save_processor_state()
114 					       &ctxt->misc_enable);  in __save_processor_state()
166 static void notrace __restore_processor_state(struct saved_context *ctxt)  in __restore_processor_state()  argument
168 	if (ctxt->misc_enable_saved)  in __restore_processor_state()
169 		wrmsrl(MSR_IA32_MISC_ENABLE, ctxt->misc_enable);  in __restore_processor_state()
175 	if (ctxt->cr4)  in __restore_processor_state()
176 		__write_cr4(ctxt->cr4);  in __restore_processor_state()
179 	wrmsrl(MSR_EFER, ctxt->efer);  in __restore_processor_state()
180 	write_cr8(ctxt->cr8);  in __restore_processor_state()
181 	__write_cr4(ctxt->cr4);  in __restore_processor_state()
183 	write_cr3(ctxt->cr3);  in __restore_processor_state()
184 	write_cr2(ctxt->cr2);  in __restore_processor_state()
185 	write_cr0(ctxt->cr0);  in __restore_processor_state()
192 	load_idt(&ctxt->idt);  in __restore_processor_state()
195 	load_idt((const struct desc_ptr *)&ctxt->idt_limit);  in __restore_processor_state()
202 	loadsegment(es, ctxt->es);  in __restore_processor_state()
203 	loadsegment(fs, ctxt->fs);  in __restore_processor_state()
204 	loadsegment(gs, ctxt->gs);  in __restore_processor_state()
205 	loadsegment(ss, ctxt->ss);  in __restore_processor_state()
214 	asm volatile ("movw %0, %%ds" :: "r" (ctxt->ds));  in __restore_processor_state()
215 	asm volatile ("movw %0, %%es" :: "r" (ctxt->es));  in __restore_processor_state()
216 	asm volatile ("movw %0, %%fs" :: "r" (ctxt->fs));  in __restore_processor_state()
217 	load_gs_index(ctxt->gs);  in __restore_processor_state()
218 	asm volatile ("movw %0, %%ss" :: "r" (ctxt->ss));  in __restore_processor_state()
220 	wrmsrl(MSR_FS_BASE, ctxt->fs_base);  in __restore_processor_state()
221 	wrmsrl(MSR_GS_BASE, ctxt->gs_base);  in __restore_processor_state()
222 	wrmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base);  in __restore_processor_state()