Lines Matching refs:VIRT_CTR
384 #define VIRT_CTR(stagger, i) ((i) + ((num_counters) * (stagger))) macro
417 addr = p4_counters[VIRT_CTR(stag, i)].counter_address; in p4_fill_in_addresses()
418 cccraddr = p4_counters[VIRT_CTR(stag, i)].cccr_address; in p4_fill_in_addresses()
518 counter_bit = 1 << VIRT_CTR(stag, ctr); in pmc_setup_one_p4_counter()
548 rdmsr(p4_counters[VIRT_CTR(stag, ctr)].cccr_address, in pmc_setup_one_p4_counter()
557 wrmsr(p4_counters[VIRT_CTR(stag, ctr)].cccr_address, in pmc_setup_one_p4_counter()
588 rdmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high); in p4_setup_ctrs()
591 wrmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high); in p4_setup_ctrs()
606 wrmsrl(p4_counters[VIRT_CTR(stag, i)].counter_address, in p4_setup_ctrs()
645 real = VIRT_CTR(stag, i); in p4_check_ctrs()
678 rdmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high); in p4_start()
680 wrmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high); in p4_start()
695 rdmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high); in p4_stop()
697 wrmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high); in p4_stop()