111 static u64 precise_datala_hsw(struct perf_event *event, u64 status)  in precise_datala_hsw()  argument
117 	if (event->hw.flags & PERF_X86_EVENT_PEBS_ST_HSW)  in precise_datala_hsw()
119 	else if (event->hw.flags & PERF_X86_EVENT_PEBS_LD_HSW)  in precise_datala_hsw()
130 	if (event->hw.flags & PERF_X86_EVENT_PEBS_ST_HSW) {  in precise_datala_hsw()
502 	struct perf_event *event = cpuc->events[INTEL_PMC_IDX_FIXED_BTS];  in intel_pmu_drain_bts_buffer()  local
509 	if (!event)  in intel_pmu_drain_bts_buffer()
525 	perf_sample_data_init(&data, 0, event->hw.last_period);  in intel_pmu_drain_bts_buffer()
532 	perf_prepare_sample(&header, &data, event, &regs);  in intel_pmu_drain_bts_buffer()
534 	if (perf_output_begin(&handle, event, header.size * (top - at)))  in intel_pmu_drain_bts_buffer()
541 		perf_output_sample(&handle, &header, &data, event);  in intel_pmu_drain_bts_buffer()
547 	event->hw.interrupts++;  in intel_pmu_drain_bts_buffer()
548 	event->pending_kill = POLL_IN;  in intel_pmu_drain_bts_buffer()
668 struct event_constraint *intel_pebs_constraints(struct perf_event *event)  in intel_pebs_constraints()  argument
672 	if (!event->attr.precise_ip)  in intel_pebs_constraints()
677 			if ((event->hw.config & c->cmask) == c->code) {  in intel_pebs_constraints()
678 				event->hw.flags |= c->flags;  in intel_pebs_constraints()
687 void intel_pmu_pebs_enable(struct perf_event *event)  in intel_pmu_pebs_enable()  argument
690 	struct hw_perf_event *hwc = &event->hw;  in intel_pmu_pebs_enable()
696 	if (event->hw.flags & PERF_X86_EVENT_PEBS_LDLAT)  in intel_pmu_pebs_enable()
698 	else if (event->hw.flags & PERF_X86_EVENT_PEBS_ST)  in intel_pmu_pebs_enable()
702 void intel_pmu_pebs_disable(struct perf_event *event)  in intel_pmu_pebs_disable()  argument
705 	struct hw_perf_event *hwc = &event->hw;  in intel_pmu_pebs_disable()
709 	if (event->hw.flags & PERF_X86_EVENT_PEBS_LDLAT)  in intel_pmu_pebs_disable()
711 	else if (event->hw.flags & PERF_X86_EVENT_PEBS_ST)  in intel_pmu_pebs_disable()
849 static void __intel_pmu_pebs_event(struct perf_event *event,  in __intel_pmu_pebs_event()  argument
866 	int fl = event->hw.flags;  in __intel_pmu_pebs_event()
868 	if (!intel_pmu_save_and_restart(event))  in __intel_pmu_pebs_event()
871 	sample_type = event->attr.sample_type;  in __intel_pmu_pebs_event()
877 	perf_sample_data_init(&data, 0, event->hw.last_period);  in __intel_pmu_pebs_event()
879 	data.period = event->hw.last_period;  in __intel_pmu_pebs_event()
895 			val = precise_datala_hsw(event, pebs->dse);  in __intel_pmu_pebs_event()
940 	if (event->attr.precise_ip > 1 && x86_pmu.intel_cap.pebs_format >= 2) {  in __intel_pmu_pebs_event()
943 	} else if (event->attr.precise_ip > 1 && intel_pmu_pebs_fixup_ip(&regs))  in __intel_pmu_pebs_event()
961 	if (has_branch_stack(event))  in __intel_pmu_pebs_event()
964 	if (perf_event_overflow(event, &data, &regs))  in __intel_pmu_pebs_event()
965 		x86_pmu_stop(event, 0);  in __intel_pmu_pebs_event()
972 	struct perf_event *event = cpuc->events[0]; /* PMC0 only */  in intel_pmu_drain_pebs_core()  local
990 	WARN_ON_ONCE(!event);  in intel_pmu_drain_pebs_core()
992 	if (!event->attr.precise_ip)  in intel_pmu_drain_pebs_core()
1006 	__intel_pmu_pebs_event(event, iregs, at);  in intel_pmu_drain_pebs_core()
1013 	struct perf_event *event = NULL;  in intel_pmu_drain_pebs_nhm()  local
1042 			event = cpuc->events[bit];  in intel_pmu_drain_pebs_nhm()
1046 			WARN_ON_ONCE(!event);  in intel_pmu_drain_pebs_nhm()
1048 			if (!event->attr.precise_ip)  in intel_pmu_drain_pebs_nhm()
1057 		if (!event || bit >= x86_pmu.max_pebs_events)  in intel_pmu_drain_pebs_nhm()
1060 		__intel_pmu_pebs_event(event, iregs, at);  in intel_pmu_drain_pebs_nhm()