Lines Matching refs:h
473 u32 l, h; in intel_init_thermal() local
483 rdmsr(MSR_IA32_MISC_ENABLE, l, h); in intel_init_thermal()
485 h = lvtthmr_init; in intel_init_thermal()
496 if ((h & APIC_DM_FIXED_MASK) != APIC_DM_FIXED) in intel_init_thermal()
500 if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) { in intel_init_thermal()
507 if (h & APIC_VECTOR_MASK) { in intel_init_thermal()
510 cpu, (h & APIC_VECTOR_MASK)); in intel_init_thermal()
517 rdmsr(MSR_THERM2_CTL, l, h); in intel_init_thermal()
525 h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED; in intel_init_thermal()
526 apic_write(APIC_LVTTHMR, h); in intel_init_thermal()
528 rdmsr(MSR_IA32_THERM_INTERRUPT, l, h); in intel_init_thermal()
532 | THERM_INT_HIGH_ENABLE)) & ~THERM_INT_PLN_ENABLE, h); in intel_init_thermal()
536 | THERM_INT_HIGH_ENABLE | THERM_INT_PLN_ENABLE), h); in intel_init_thermal()
539 l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE), h); in intel_init_thermal()
542 rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h); in intel_init_thermal()
547 & ~PACKAGE_THERM_INT_PLN_ENABLE, h); in intel_init_thermal()
552 | PACKAGE_THERM_INT_PLN_ENABLE), h); in intel_init_thermal()
556 | PACKAGE_THERM_INT_HIGH_ENABLE), h); in intel_init_thermal()
561 rdmsr(MSR_IA32_MISC_ENABLE, l, h); in intel_init_thermal()
562 wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h); in intel_init_thermal()