49 #define roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, t0, t1, t2, t3, t4, t5, t6, \  argument
57 	vmovdqa .Lpre_tf_hi_s1, t1; \
72 	filter_8bit(x0, t0, t1, t7, t6); \
73 	filter_8bit(x7, t0, t1, t7, t6); \
74 	filter_8bit(x1, t0, t1, t7, t6); \
75 	filter_8bit(x4, t0, t1, t7, t6); \
76 	filter_8bit(x2, t0, t1, t7, t6); \
77 	filter_8bit(x5, t0, t1, t7, t6); \
86 	vmovdqa .Lpost_tf_hi_s1, t1; \
99 	filter_8bit(x0, t0, t1, t7, t6); \
100 	filter_8bit(x7, t0, t1, t7, t6); \
101 	filter_8bit(x3, t0, t1, t7, t6); \
102 	filter_8bit(x6, t0, t1, t7, t6); \
118 	vpsrldq $1, t0, t1; \
123 	vpshufb t6, t1, t1; \
167 	vpxor t1, x6, x6; \
267 #define rol32_1_16(v0, v1, v2, v3, t0, t1, t2, zero) \  argument
272 	vpcmpgtb v1, zero, t1; \
274 	vpabsb t1, t1; \
286 	vpor t1, v2, v2; \
297 #define fls16(l, l0, l1, l2, l3, l4, l5, l6, l7, r, t0, t1, t2, t3, tt0, \  argument
310 	vpshufb tt0, t0, t1; \
315 	vpand l1, t1, t1; \
319 	rol32_1_16(t3, t2, t1, t0, tt1, tt2, tt3, tt0); \
323 	vpxor l5, t1, l5; \
341 	vpshufb tt0, t0, t1; \
346 	vpor 5 * 16(r), t1, t1; \
351 	vpxor 1 * 16(r), t1, t1; \
355 	vmovdqu t1, 1 * 16(r); \
369 	vpshufb tt0, t0, t1; \
374 	vpand 1 * 16(r), t1, t1; \
378 	rol32_1_16(t3, t2, t1, t0, tt1, tt2, tt3, tt0); \
381 	vpxor 5 * 16(r), t1, t1; \
385 	vmovdqu t1, 5 * 16(r); \
400 	vpshufb tt0, t0, t1; \
405 	vpor l5, t1, t1; \
411 	vpxor l1, t1, l1; \
418 #define transpose_4x4(x0, x1, x2, x3, t1, t2) \  argument
422 	vpunpckldq x3, x2, t1; \
425 	vpunpckhqdq t1, x0, x1; \
426 	vpunpcklqdq t1, x0, x0; \