285 static void save_tile_dma_state(struct tile_dma_state *dma)  in save_tile_dma_state()  argument
306 	dma->src = __insn_mfspr(SPR_DMA_SRC_ADDR);  in save_tile_dma_state()
307 	dma->src_chunk = __insn_mfspr(SPR_DMA_SRC_CHUNK_ADDR);  in save_tile_dma_state()
308 	dma->dest = __insn_mfspr(SPR_DMA_DST_ADDR);  in save_tile_dma_state()
309 	dma->dest_chunk = __insn_mfspr(SPR_DMA_DST_CHUNK_ADDR);  in save_tile_dma_state()
310 	dma->strides = __insn_mfspr(SPR_DMA_STRIDE);  in save_tile_dma_state()
311 	dma->chunk_size = __insn_mfspr(SPR_DMA_CHUNK_SIZE);  in save_tile_dma_state()
312 	dma->byte = __insn_mfspr(SPR_DMA_BYTE);  in save_tile_dma_state()
313 	dma->status = (state & SPR_DMA_STATUS__RUNNING_MASK) |  in save_tile_dma_state()
320 	const struct tile_dma_state *dma = &t->tile_dma_state;  in restore_tile_dma_state()  local
326 	if ((dma->status & SPR_DMA_STATUS__DONE_MASK) &&  in restore_tile_dma_state()
335 	__insn_mtspr(SPR_DMA_SRC_ADDR, dma->src);  in restore_tile_dma_state()
336 	__insn_mtspr(SPR_DMA_SRC_CHUNK_ADDR, dma->src_chunk);  in restore_tile_dma_state()
337 	__insn_mtspr(SPR_DMA_DST_ADDR, dma->dest);  in restore_tile_dma_state()
338 	__insn_mtspr(SPR_DMA_DST_CHUNK_ADDR, dma->dest_chunk);  in restore_tile_dma_state()
339 	__insn_mtspr(SPR_DMA_STRIDE, dma->strides);  in restore_tile_dma_state()
340 	__insn_mtspr(SPR_DMA_CHUNK_SIZE, dma->chunk_size);  in restore_tile_dma_state()
341 	__insn_mtspr(SPR_DMA_BYTE, dma->byte);  in restore_tile_dma_state()
351 	if ((dma->status & DMA_STATUS_MASK) == SPR_DMA_STATUS__RUNNING_MASK) {  in restore_tile_dma_state()
413 	struct tile_dma_state *dma = &current->thread.tile_dma_state;  in _prepare_arch_switch()  local
414 	if (dma->enabled)  in _prepare_arch_switch()
415 		save_tile_dma_state(dma);  in _prepare_arch_switch()