38 #define LOAD(type,addr,dest)	type [addr], dest  argument
42 #define LOAD_BLK(addr,dest)	ldda [addr] ASI_BLK_P, dest  argument
75 #define MAIN_LOOP_CHUNK(src, dest, fdest, fsrc, len, jmptgt)	\  argument
77 	EX_ST(STORE_BLK(%fsrc, %dest));				\
81 	 add			%dest, 0x40, %dest;		\
83 #define LOOP_CHUNK1(src, dest, len, branch_dest)		\  argument
84 	MAIN_LOOP_CHUNK(src, dest, f0,  f48, len, branch_dest)
85 #define LOOP_CHUNK2(src, dest, len, branch_dest)		\  argument
86 	MAIN_LOOP_CHUNK(src, dest, f16, f48, len, branch_dest)
87 #define LOOP_CHUNK3(src, dest, len, branch_dest)		\  argument
88 	MAIN_LOOP_CHUNK(src, dest, f32, f48, len, branch_dest)
91 #define STORE_SYNC(dest, fsrc)				\  argument
92 	EX_ST(STORE_BLK(%fsrc, %dest));			\
93 	add			%dest, 0x40, %dest;	\
96 #define STORE_JUMP(dest, fsrc, target)			\  argument
97 	EX_ST(STORE_BLK(%fsrc, %dest));			\
98 	add			%dest, 0x40, %dest;	\
102 #define FINISH_VISCHUNK(dest, f0, f1, left)	\  argument
106 	EX_ST(STORE(std, %f48, %dest));		\
107 	add			%dest, 8, %dest;
109 #define UNEVEN_VISCHUNK_LAST(dest, f0, f1, left)	\  argument
114 #define UNEVEN_VISCHUNK(dest, f0, f1, left)		\  argument
115 	UNEVEN_VISCHUNK_LAST(dest, f0, f1, left)	\