Lines Matching refs:__u64
71 static int address_is_sign_extended(__u64 a) in address_is_sign_extended()
73 __u64 b; in address_is_sign_extended()
75 b = (__u64)(__s64)(__s32)(a & 0xffffffffUL); in address_is_sign_extended()
87 __u64 *address) in generate_and_check_address()
89 __u64 base_address, addr; in generate_and_check_address()
105 addr = (__u64)((__s64)base_address + (displacement << width_shift)); in generate_and_check_address()
107 __u64 offset; in generate_and_check_address()
137 static void misaligned_kernel_word_load(__u64 address, int do_sign_extend, __u64 *result) in misaligned_kernel_word_load()
147 *result = (__u64)(__s64) *(short *) &x; in misaligned_kernel_word_load()
149 *result = (__u64) x; in misaligned_kernel_word_load()
153 static void misaligned_kernel_word_store(__u64 address, __u64 value) in misaligned_kernel_word_store()
174 __u64 address; in misaligned_load()
183 __u64 buffer; in misaligned_load()
195 regs->regs[destreg] = (__u64)(__s64) *(__s16 *) &buffer; in misaligned_load()
197 regs->regs[destreg] = (__u64) *(__u16 *) &buffer; in misaligned_load()
201 regs->regs[destreg] = (__u64)(__s64) *(__s32 *) &buffer; in misaligned_load()
213 __u64 lo, hi; in misaligned_load()
248 __u64 address; in misaligned_store()
257 __u64 buffer; in misaligned_store()
284 __u64 val = regs->regs[srcreg]; in misaligned_store()
320 __u64 address; in misaligned_fpu_load()
329 __u64 buffer; in misaligned_fpu_load()
392 __u64 address; in misaligned_fpu_store()
401 __u64 buffer; in misaligned_fpu_store()