Lines Matching refs:BIT
19 #define NMISR_MAN_NMI BIT(0)
20 #define NMISR_AUX_NMI BIT(1)
24 #define NMIMR_MAN_NMIM BIT(0) /* Manual NMI mask */
25 #define NMIMR_AUX_NMIM BIT(1) /* Auxiliary NMI mask */
41 #define PCIECR_PCIEMUX1 BIT(15)
42 #define PCIECR_PCIEMUX0 BIT(14)
43 #define PCIECR_PRST4 BIT(12) /* slot 4 card present */
44 #define PCIECR_PRST3 BIT(11) /* slot 3 card present */
45 #define PCIECR_PRST2 BIT(10) /* slot 2 card present */
46 #define PCIECR_PRST1 BIT(9) /* slot 1 card present */
47 #define PCIECR_CLKEN BIT(4) /* oscillator enable */
55 #define LCLASR_FRAMEN BIT(15)
70 #define SCBR_I2CMEN BIT(0) /* FPGA I2C master enable */
71 #define SCBR_I2CCEN BIT(1) /* CPU I2C master enable */
74 #define PWRCR_SCISEL0 BIT(0)
75 #define PWRCR_SCISEL1 BIT(1)
76 #define PWRCR_SCIEN BIT(2) /* Serial port enable */
77 #define PWRCR_PDWNACK BIT(5) /* Power down acknowledge */
78 #define PWRCR_PDWNREQ BIT(7) /* Power down request */
79 #define PWRCR_INT2 BIT(11) /* INT2 connection to power manager */
80 #define PWRCR_BUPINIT BIT(13) /* DDR backup initialize */
81 #define PWRCR_BKPRST BIT(15) /* Backup power reset */