Lines Matching refs:regs
26 int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs) in arch_uprobe_pre_xol() argument
28 if (psw_bits(regs->psw).eaba == PSW_AMODE_24BIT) in arch_uprobe_pre_xol()
30 if (!is_compat_task() && psw_bits(regs->psw).eaba == PSW_AMODE_31BIT) in arch_uprobe_pre_xol()
32 clear_pt_regs_flag(regs, PIF_PER_TRAP); in arch_uprobe_pre_xol()
33 auprobe->saved_per = psw_bits(regs->psw).r; in arch_uprobe_pre_xol()
34 auprobe->saved_int_code = regs->int_code; in arch_uprobe_pre_xol()
35 regs->int_code = UPROBE_TRAP_NR; in arch_uprobe_pre_xol()
36 regs->psw.addr = current->utask->xol_vaddr; in arch_uprobe_pre_xol()
44 struct pt_regs *regs = task_pt_regs(tsk); in arch_uprobe_xol_was_trapped() local
46 if (regs->int_code != UPROBE_TRAP_NR) in arch_uprobe_xol_was_trapped()
52 struct pt_regs *regs) in check_per_event() argument
54 if (!(regs->psw.mask & PSW_MASK_PER)) in check_per_event()
68 regs->psw.addr >= current->thread.per_user.start && in check_per_event()
69 regs->psw.addr <= current->thread.per_user.end) in check_per_event()
75 int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs) in arch_uprobe_post_xol() argument
82 psw_bits(regs->psw).r = auprobe->saved_per; in arch_uprobe_post_xol()
83 regs->int_code = auprobe->saved_int_code; in arch_uprobe_post_xol()
86 regs->psw.addr += utask->vaddr - utask->xol_vaddr; in arch_uprobe_post_xol()
90 regs->gprs[reg] += utask->vaddr - utask->xol_vaddr; in arch_uprobe_post_xol()
95 if (regs->psw.addr - utask->xol_vaddr == ilen) in arch_uprobe_post_xol()
96 regs->psw.addr = utask->vaddr + ilen; in arch_uprobe_post_xol()
99 current->thread.per_user.control, regs)) { in arch_uprobe_post_xol()
103 set_pt_regs_flag(regs, PIF_PER_TRAP); in arch_uprobe_post_xol()
112 struct pt_regs *regs = args->regs; in arch_uprobe_exception_notify() local
114 if (!user_mode(regs)) in arch_uprobe_exception_notify()
116 if (regs->int_code & 0x200) /* Trap during transaction */ in arch_uprobe_exception_notify()
120 if (uprobe_pre_sstep_notifier(regs)) in arch_uprobe_exception_notify()
124 if (uprobe_post_sstep_notifier(regs)) in arch_uprobe_exception_notify()
132 void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs) in arch_uprobe_abort_xol() argument
135 regs->int_code = auprobe->saved_int_code; in arch_uprobe_abort_xol()
136 regs->psw.addr = current->utask->vaddr; in arch_uprobe_abort_xol()
141 struct pt_regs *regs) in arch_uretprobe_hijack_return_addr() argument
145 orig = regs->gprs[14]; in arch_uretprobe_hijack_return_addr()
146 regs->gprs[14] = trampoline; in arch_uretprobe_hijack_return_addr()
178 #define emu_store_ril(regs, ptr, input) \ argument
191 sim_stor_event(regs, \
197 #define emu_cmp_ril(regs, ptr, cmp) \ argument
210 psw_bits((regs)->psw).cc = 1; \
212 psw_bits((regs)->psw).cc = 2; \
214 psw_bits((regs)->psw).cc = 0; \
238 static void sim_stor_event(struct pt_regs *regs, void *addr, int len) in sim_stor_event() argument
240 if (!(regs->psw.mask & PSW_MASK_PER)) in sim_stor_event()
248 current->thread.per_event.address = regs->psw.addr; in sim_stor_event()
250 set_pt_regs_flag(regs, PIF_PER_TRAP); in sim_stor_event()
257 static void handle_insn_ril(struct arch_uprobe *auprobe, struct pt_regs *regs) in handle_insn_ril() argument
266 rx = (union split_register *) ®s->gprs[insn->reg]; in handle_insn_ril()
267 uptr = (void *)(regs->psw.addr + (insn->disp * 2)); in handle_insn_ril()
305 rc = emu_store_ril(regs, (u16 __user *)uptr, &rx->u16[3]); in handle_insn_ril()
308 rc = emu_store_ril(regs, (u64 __user *)uptr, &rx->u64); in handle_insn_ril()
311 rc = emu_store_ril(regs, (u32 __user *)uptr, &rx->u32[1]); in handle_insn_ril()
322 rc = emu_cmp_ril(regs, (s16 __user *)uptr, &rx->s64); in handle_insn_ril()
325 rc = emu_cmp_ril(regs, (s16 __user *)uptr, &rx->s32[1]); in handle_insn_ril()
328 rc = emu_cmp_ril(regs, (u16 __user *)uptr, &rx->u64); in handle_insn_ril()
331 rc = emu_cmp_ril(regs, (u16 __user *)uptr, &rx->u32[1]); in handle_insn_ril()
334 rc = emu_cmp_ril(regs, (s64 __user *)uptr, &rx->s64); in handle_insn_ril()
337 rc = emu_cmp_ril(regs, (u64 __user *)uptr, &rx->u64); in handle_insn_ril()
340 rc = emu_cmp_ril(regs, (s32 __user *)uptr, &rx->s64); in handle_insn_ril()
343 rc = emu_cmp_ril(regs, (s32 __user *)uptr, &rx->s32[1]); in handle_insn_ril()
346 rc = emu_cmp_ril(regs, (u32 __user *)uptr, &rx->u64); in handle_insn_ril()
349 rc = emu_cmp_ril(regs, (u32 __user *)uptr, &rx->u32[1]); in handle_insn_ril()
354 adjust_psw_addr(®s->psw, ilen); in handle_insn_ril()
357 regs->int_code = ilen << 16 | 0x0001; in handle_insn_ril()
358 do_report_trap(regs, SIGILL, ILL_ILLOPC, NULL); in handle_insn_ril()
361 regs->int_code = ilen << 16 | 0x0006; in handle_insn_ril()
362 do_report_trap(regs, SIGILL, ILL_ILLOPC , NULL); in handle_insn_ril()
365 regs->int_code = ilen << 16 | 0x0005; in handle_insn_ril()
366 do_report_trap(regs, SIGSEGV, SEGV_MAPERR, NULL); in handle_insn_ril()
371 bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs) in arch_uprobe_skip_sstep() argument
373 if ((psw_bits(regs->psw).eaba == PSW_AMODE_24BIT) || in arch_uprobe_skip_sstep()
374 ((psw_bits(regs->psw).eaba == PSW_AMODE_31BIT) && in arch_uprobe_skip_sstep()
376 regs->psw.addr = __rewind_psw(regs->psw, UPROBE_SWBP_INSN_SIZE); in arch_uprobe_skip_sstep()
377 do_report_trap(regs, SIGILL, ILL_ILLADR, NULL); in arch_uprobe_skip_sstep()
381 handle_insn_ril(auprobe, regs); in arch_uprobe_skip_sstep()