68 	mbox_stat = ctx->csa.prob.mb_stat_R;  in spu_backing_mbox_read()
74 		*data = ctx->csa.prob.pu_mb_R;  in spu_backing_mbox_read()
75 		ctx->csa.prob.mb_stat_R &= ~(0x0000ff);  in spu_backing_mbox_read()
86 	return ctx->csa.prob.mb_stat_R;  in spu_backing_mbox_stat_read()
97 	stat = ctx->csa.prob.mb_stat_R;  in spu_backing_mbox_stat_poll()
133 	if (ctx->csa.prob.mb_stat_R & 0xff0000) {  in spu_backing_ibox_read()
139 		ctx->csa.prob.mb_stat_R &= ~(0xff0000);  in spu_backing_ibox_read()
157 	if ((ctx->csa.prob.mb_stat_R) & 0x00ff00) {  in spu_backing_wbox_write()
159 		int avail = (ctx->csa.prob.mb_stat_R & 0x00ff00) >> 8;  in spu_backing_wbox_write()
168 		ctx->csa.prob.mb_stat_R &= ~(0x00ff00);  in spu_backing_wbox_write()
169 		ctx->csa.prob.mb_stat_R |= (((4 - slot) & 0xff) << 8);  in spu_backing_wbox_write()
257 	return ctx->csa.prob.spu_npc_RW;  in spu_backing_npc_read()
262 	ctx->csa.prob.spu_npc_RW = val;  in spu_backing_npc_write()
267 	return ctx->csa.prob.spu_status_R;  in spu_backing_status_read()
282 	return ctx->csa.prob.spu_runcntl_RW;  in spu_backing_runcntl_read()
288 	ctx->csa.prob.spu_runcntl_RW = val;  in spu_backing_runcntl_write()
290 		ctx->csa.prob.spu_status_R &=  in spu_backing_runcntl_write()
296 		ctx->csa.prob.spu_status_R |= SPU_STATUS_RUNNING;  in spu_backing_runcntl_write()
298 		ctx->csa.prob.spu_status_R &= ~SPU_STATUS_RUNNING;  in spu_backing_runcntl_write()
333 	struct spu_problem_collapsed *prob = &ctx->csa.prob;  in spu_backing_set_mfc_query()  local
338 	if (prob->dma_querytype_RW)  in spu_backing_set_mfc_query()
342 	prob->dma_querymask_RW = mask;  in spu_backing_set_mfc_query()
343 	prob->dma_querytype_RW = mode;  in spu_backing_set_mfc_query()
349 	ctx->csa.prob.dma_tagstatus_R &= mask;  in spu_backing_set_mfc_query()
358 	return ctx->csa.prob.dma_tagstatus_R;  in spu_backing_read_mfc_tagstatus()
363 	return ctx->csa.prob.dma_qstatus_R;  in spu_backing_get_mfc_free_elements()