141 	struct mpc52xx_gpt_priv *gpt = irq_data_get_irq_chip_data(d);  in mpc52xx_gpt_irq_unmask()  local
144 	spin_lock_irqsave(&gpt->lock, flags);  in mpc52xx_gpt_irq_unmask()
145 	setbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_IRQ_EN);  in mpc52xx_gpt_irq_unmask()
146 	spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_irq_unmask()
151 	struct mpc52xx_gpt_priv *gpt = irq_data_get_irq_chip_data(d);  in mpc52xx_gpt_irq_mask()  local
154 	spin_lock_irqsave(&gpt->lock, flags);  in mpc52xx_gpt_irq_mask()
155 	clrbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_IRQ_EN);  in mpc52xx_gpt_irq_mask()
156 	spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_irq_mask()
161 	struct mpc52xx_gpt_priv *gpt = irq_data_get_irq_chip_data(d);  in mpc52xx_gpt_irq_ack()  local
163 	out_be32(&gpt->regs->status, MPC52xx_GPT_STATUS_IRQMASK);  in mpc52xx_gpt_irq_ack()
168 	struct mpc52xx_gpt_priv *gpt = irq_data_get_irq_chip_data(d);  in mpc52xx_gpt_irq_set_type()  local
172 	dev_dbg(gpt->dev, "%s: virq=%i type=%x\n", __func__, d->irq, flow_type);  in mpc52xx_gpt_irq_set_type()
174 	spin_lock_irqsave(&gpt->lock, flags);  in mpc52xx_gpt_irq_set_type()
175 	reg = in_be32(&gpt->regs->mode) & ~MPC52xx_GPT_MODE_ICT_MASK;  in mpc52xx_gpt_irq_set_type()
180 	out_be32(&gpt->regs->mode, reg);  in mpc52xx_gpt_irq_set_type()
181 	spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_irq_set_type()
196 	struct mpc52xx_gpt_priv *gpt = irq_get_handler_data(virq);  in mpc52xx_gpt_irq_cascade()  local
200 	status = in_be32(&gpt->regs->status) & MPC52xx_GPT_STATUS_IRQMASK;  in mpc52xx_gpt_irq_cascade()
202 		sub_virq = irq_linear_revmap(gpt->irqhost, 0);  in mpc52xx_gpt_irq_cascade()
210 	struct mpc52xx_gpt_priv *gpt = h->host_data;  in mpc52xx_gpt_irq_map()  local
212 	dev_dbg(gpt->dev, "%s: h=%p, virq=%i\n", __func__, h, virq);  in mpc52xx_gpt_irq_map()
213 	irq_set_chip_data(virq, gpt);  in mpc52xx_gpt_irq_map()
224 	struct mpc52xx_gpt_priv *gpt = h->host_data;  in mpc52xx_gpt_irq_xlate()  local
226 	dev_dbg(gpt->dev, "%s: flags=%i\n", __func__, intspec[0]);  in mpc52xx_gpt_irq_xlate()
229 		dev_err(gpt->dev, "bad irq specifier in %s\n", ct->full_name);  in mpc52xx_gpt_irq_xlate()
245 mpc52xx_gpt_irq_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)  in mpc52xx_gpt_irq_setup()  argument
255 	gpt->irqhost = irq_domain_add_linear(node, 1, &mpc52xx_gpt_irq_ops, gpt);  in mpc52xx_gpt_irq_setup()
256 	if (!gpt->irqhost) {  in mpc52xx_gpt_irq_setup()
257 		dev_err(gpt->dev, "irq_domain_add_linear() failed\n");  in mpc52xx_gpt_irq_setup()
261 	irq_set_handler_data(cascade_virq, gpt);  in mpc52xx_gpt_irq_setup()
267 	spin_lock_irqsave(&gpt->lock, flags);  in mpc52xx_gpt_irq_setup()
268 	mode = in_be32(&gpt->regs->mode);  in mpc52xx_gpt_irq_setup()
270 		out_be32(&gpt->regs->mode, mode | MPC52xx_GPT_MODE_MS_IC);  in mpc52xx_gpt_irq_setup()
271 	spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_irq_setup()
273 	dev_dbg(gpt->dev, "%s() complete. virq=%i\n", __func__, cascade_virq);  in mpc52xx_gpt_irq_setup()
288 	struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc);  in mpc52xx_gpt_gpio_get()  local
290 	return (in_be32(&gpt->regs->status) >> 8) & 1;  in mpc52xx_gpt_gpio_get()
296 	struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc);  in mpc52xx_gpt_gpio_set()  local
300 	dev_dbg(gpt->dev, "%s: gpio:%d v:%d\n", __func__, gpio, v);  in mpc52xx_gpt_gpio_set()
303 	spin_lock_irqsave(&gpt->lock, flags);  in mpc52xx_gpt_gpio_set()
304 	clrsetbits_be32(&gpt->regs->mode, MPC52xx_GPT_MODE_GPIO_MASK, r);  in mpc52xx_gpt_gpio_set()
305 	spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_gpio_set()
310 	struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc);  in mpc52xx_gpt_gpio_dir_in()  local
313 	dev_dbg(gpt->dev, "%s: gpio:%d\n", __func__, gpio);  in mpc52xx_gpt_gpio_dir_in()
315 	spin_lock_irqsave(&gpt->lock, flags);  in mpc52xx_gpt_gpio_dir_in()
316 	clrbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_GPIO_MASK);  in mpc52xx_gpt_gpio_dir_in()
317 	spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_gpio_dir_in()
330 mpc52xx_gpt_gpio_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)  in mpc52xx_gpt_gpio_setup()  argument
339 	gpt->gc.label = kstrdup(node->full_name, GFP_KERNEL);  in mpc52xx_gpt_gpio_setup()
340 	if (!gpt->gc.label) {  in mpc52xx_gpt_gpio_setup()
341 		dev_err(gpt->dev, "out of memory\n");  in mpc52xx_gpt_gpio_setup()
345 	gpt->gc.ngpio = 1;  in mpc52xx_gpt_gpio_setup()
346 	gpt->gc.direction_input  = mpc52xx_gpt_gpio_dir_in;  in mpc52xx_gpt_gpio_setup()
347 	gpt->gc.direction_output = mpc52xx_gpt_gpio_dir_out;  in mpc52xx_gpt_gpio_setup()
348 	gpt->gc.get = mpc52xx_gpt_gpio_get;  in mpc52xx_gpt_gpio_setup()
349 	gpt->gc.set = mpc52xx_gpt_gpio_set;  in mpc52xx_gpt_gpio_setup()
350 	gpt->gc.base = -1;  in mpc52xx_gpt_gpio_setup()
351 	gpt->gc.of_node = node;  in mpc52xx_gpt_gpio_setup()
354 	clrsetbits_be32(&gpt->regs->mode, MPC52xx_GPT_MODE_MS_MASK,  in mpc52xx_gpt_gpio_setup()
357 	rc = gpiochip_add(&gpt->gc);  in mpc52xx_gpt_gpio_setup()
359 		dev_err(gpt->dev, "gpiochip_add() failed; rc=%i\n", rc);  in mpc52xx_gpt_gpio_setup()
361 	dev_dbg(gpt->dev, "%s() complete.\n", __func__);  in mpc52xx_gpt_gpio_setup()
378 	struct mpc52xx_gpt_priv *gpt;  in mpc52xx_gpt_from_irq()  local
384 		gpt = container_of(pos, struct mpc52xx_gpt_priv, list);  in mpc52xx_gpt_from_irq()
385 		if (gpt->irqhost && irq == irq_linear_revmap(gpt->irqhost, 0)) {  in mpc52xx_gpt_from_irq()
387 			return gpt;  in mpc52xx_gpt_from_irq()
396 static int mpc52xx_gpt_do_start(struct mpc52xx_gpt_priv *gpt, u64 period,  in mpc52xx_gpt_do_start()  argument
416 	clocks = period * (u64)gpt->ipb_freq;  in mpc52xx_gpt_do_start()
444 	spin_lock_irqsave(&gpt->lock, flags);  in mpc52xx_gpt_do_start()
446 		gpt->wdt_mode |= MPC52xx_GPT_IS_WDT;  in mpc52xx_gpt_do_start()
447 	else if ((gpt->wdt_mode & MPC52xx_GPT_IS_WDT) != 0) {  in mpc52xx_gpt_do_start()
448 		spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_do_start()
451 	out_be32(&gpt->regs->count, prescale << 16 | clocks);  in mpc52xx_gpt_do_start()
452 	clrsetbits_be32(&gpt->regs->mode, clear, set);  in mpc52xx_gpt_do_start()
453 	spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_do_start()
466 int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, u64 period,  in mpc52xx_gpt_start_timer()  argument
469 	return mpc52xx_gpt_do_start(gpt, period, continuous, 0);  in mpc52xx_gpt_start_timer()
479 int mpc52xx_gpt_stop_timer(struct mpc52xx_gpt_priv *gpt)  in mpc52xx_gpt_stop_timer()  argument
484 	spin_lock_irqsave(&gpt->lock, flags);  in mpc52xx_gpt_stop_timer()
485 	if ((gpt->wdt_mode & MPC52xx_GPT_IS_WDT) != 0) {  in mpc52xx_gpt_stop_timer()
486 		spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_stop_timer()
490 	clrbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_COUNTER_ENABLE);  in mpc52xx_gpt_stop_timer()
491 	spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_stop_timer()
502 u64 mpc52xx_gpt_timer_period(struct mpc52xx_gpt_priv *gpt)  in mpc52xx_gpt_timer_period()  argument
508 	spin_lock_irqsave(&gpt->lock, flags);  in mpc52xx_gpt_timer_period()
509 	period = in_be32(&gpt->regs->count);  in mpc52xx_gpt_timer_period()
510 	spin_unlock_irqrestore(&gpt->lock, flags);  in mpc52xx_gpt_timer_period()
517 	do_div(period, (u64)gpt->ipb_freq);  in mpc52xx_gpt_timer_period()
685 static int mpc52xx_gpt_wdt_setup(struct mpc52xx_gpt_priv *gpt,  in mpc52xx_gpt_wdt_setup()  argument
691 	mpc52xx_gpt_wdt = gpt;  in mpc52xx_gpt_wdt_setup()
698 	if (mpc52xx_gpt_do_start(gpt, real_timeout, 0, 1))  in mpc52xx_gpt_wdt_setup()
699 		dev_warn(gpt->dev, "starting as wdt failed\n");  in mpc52xx_gpt_wdt_setup()
701 		dev_info(gpt->dev, "watchdog set to %us timeout\n", *period);  in mpc52xx_gpt_wdt_setup()
712 static inline int mpc52xx_gpt_wdt_setup(struct mpc52xx_gpt_priv *gpt,  in mpc52xx_gpt_wdt_setup()  argument
725 	struct mpc52xx_gpt_priv *gpt;  in mpc52xx_gpt_probe()  local
727 	gpt = kzalloc(sizeof *gpt, GFP_KERNEL);  in mpc52xx_gpt_probe()
728 	if (!gpt)  in mpc52xx_gpt_probe()
731 	spin_lock_init(&gpt->lock);  in mpc52xx_gpt_probe()
732 	gpt->dev = &ofdev->dev;  in mpc52xx_gpt_probe()
733 	gpt->ipb_freq = mpc5xxx_get_bus_frequency(ofdev->dev.of_node);  in mpc52xx_gpt_probe()
734 	gpt->regs = of_iomap(ofdev->dev.of_node, 0);  in mpc52xx_gpt_probe()
735 	if (!gpt->regs) {  in mpc52xx_gpt_probe()
736 		kfree(gpt);  in mpc52xx_gpt_probe()
740 	dev_set_drvdata(&ofdev->dev, gpt);  in mpc52xx_gpt_probe()
742 	mpc52xx_gpt_gpio_setup(gpt, ofdev->dev.of_node);  in mpc52xx_gpt_probe()
743 	mpc52xx_gpt_irq_setup(gpt, ofdev->dev.of_node);  in mpc52xx_gpt_probe()
746 	list_add(&gpt->list, &mpc52xx_gpt_list);  in mpc52xx_gpt_probe()
754 		gpt->wdt_mode = MPC52xx_GPT_CAN_WDT;  in mpc52xx_gpt_probe()
758 			dev_info(gpt->dev, "used as watchdog\n");  in mpc52xx_gpt_probe()
759 			gpt->wdt_mode |= MPC52xx_GPT_IS_WDT;  in mpc52xx_gpt_probe()
761 			dev_info(gpt->dev, "can function as watchdog\n");  in mpc52xx_gpt_probe()
762 		mpc52xx_gpt_wdt_setup(gpt, on_boot_wdt);  in mpc52xx_gpt_probe()