228 	int mul, int div)  in mpc512x_clk_factor()  argument
234 					 mul, div);  in mpc512x_clk_factor()
366 	{ .val = 2, .div = 2, },
367 	{ .val = 3, .div = 3, },
368 	{ .val = 4, .div = 4, },
369 	{ .val = 6, .div = 6, },
370 	{ .div = 0, },
375 	{ .val = 1, .div = 1, },
376 	{ .val = 2, .div = 2, },
377 	{ .val = 3, .div = 3, },
378 	{ .val = 4, .div = 4, },
379 	{ .div = 0, },
599 	int div;  in mpc512x_clk_setup_mclk()  local
650 	div = clk_get_rate(clks[MPC512x_CLK_SYS]);  in mpc512x_clk_setup_mclk()
651 	div /= clk_get_rate(clks[MPC512x_CLK_IPS]);  in mpc512x_clk_setup_mclk()
653 	out_be32(mccr_reg, (0 << 16) | ((div - 1) << 17));  in mpc512x_clk_setup_mclk()
654 	out_be32(mccr_reg, (1 << 16) | ((div - 1) << 17));  in mpc512x_clk_setup_mclk()
707 	int mul, div;  in mpc512x_clk_setup_clock_tree()  local
779 	div = 2;	/* compensate for the fractional factor */  in mpc512x_clk_setup_clock_tree()
780 	clks[MPC512x_CLK_E300] = mpc512x_clk_factor("e300", "csb", mul, div);  in mpc512x_clk_setup_clock_tree()