Lines Matching refs:r0
23 mfspr r0, SPRN_L1CSR1
24 andi. r3, r0, L1CSR1_ICE
26 oris r0, r0, L1CSR1_CPE@h
27 ori r0, r0, (L1CSR1_ICFI | L1CSR1_ICLFR | L1CSR1_ICE)
28 mtspr SPRN_L1CSR1, r0 /* Enable I-Cache */
33 mfspr r0, SPRN_L1CSR0
34 andi. r3, r0, L1CSR0_DCE
38 li r0, 0
39 mtspr SPRN_L1CSR0, r0 /* Disable */
42 li r0, (L1CSR0_DCFI | L1CSR0_CLFC)
43 mtspr SPRN_L1CSR0, r0 /* Invalidate */
45 1: mfspr r0, SPRN_L1CSR0
46 andi. r3, r0, L1CSR0_CLFC
48 oris r0, r0, L1CSR0_CPE@h
49 ori r0, r0, L1CSR0_DCE
52 mtspr SPRN_L1CSR0, r0 /* Enable */