Lines Matching refs:uint64_t
41 uint64_t hour_minute_second_millisecond);
42 int64_t opal_tpo_read(uint64_t token, __be32 *year_mon_day, __be32 *hour_min);
43 int64_t opal_tpo_write(uint64_t token, uint32_t year_mon_day,
45 int64_t opal_cec_power_down(uint64_t request);
47 int64_t opal_read_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
48 int64_t opal_write_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
49 int64_t opal_handle_interrupt(uint64_t isn, __be64 *outstanding_event_mask);
51 int64_t opal_pci_set_hub_tce_memory(uint64_t hub_id, uint64_t tce_mem_addr,
52 uint64_t tce_mem_size);
53 int64_t opal_pci_set_phb_tce_memory(uint64_t phb_id, uint64_t tce_mem_addr,
54 uint64_t tce_mem_size);
55 int64_t opal_pci_config_read_byte(uint64_t phb_id, uint64_t bus_dev_func,
56 uint64_t offset, uint8_t *data);
57 int64_t opal_pci_config_read_half_word(uint64_t phb_id, uint64_t bus_dev_func,
58 uint64_t offset, __be16 *data);
59 int64_t opal_pci_config_read_word(uint64_t phb_id, uint64_t bus_dev_func,
60 uint64_t offset, __be32 *data);
61 int64_t opal_pci_config_write_byte(uint64_t phb_id, uint64_t bus_dev_func,
62 uint64_t offset, uint8_t data);
63 int64_t opal_pci_config_write_half_word(uint64_t phb_id, uint64_t bus_dev_func,
64 uint64_t offset, uint16_t data);
65 int64_t opal_pci_config_write_word(uint64_t phb_id, uint64_t bus_dev_func,
66 uint64_t offset, uint32_t data);
69 int64_t opal_register_exception_handler(uint64_t opal_exception,
70 uint64_t handler_address,
71 uint64_t glue_cache_line);
72 int64_t opal_pci_eeh_freeze_status(uint64_t phb_id, uint64_t pe_number,
76 int64_t opal_pci_eeh_freeze_clear(uint64_t phb_id, uint64_t pe_number,
77 uint64_t eeh_action_token);
78 int64_t opal_pci_eeh_freeze_set(uint64_t phb_id, uint64_t pe_number,
79 uint64_t eeh_action_token);
80 int64_t opal_pci_err_inject(uint64_t phb_id, uint32_t pe_no, uint32_t type,
81 uint32_t func, uint64_t addr, uint64_t mask);
82 int64_t opal_pci_shpc(uint64_t phb_id, uint64_t shpc_action, uint8_t *state);
86 int64_t opal_pci_phb_mmio_enable(uint64_t phb_id, uint16_t window_type,
88 int64_t opal_pci_set_phb_mem_window(uint64_t phb_id, uint16_t window_type,
90 uint64_t starting_real_address,
91 uint64_t starting_pci_address,
92 uint64_t size);
93 int64_t opal_pci_map_pe_mmio_window(uint64_t phb_id, uint16_t pe_number,
96 int64_t opal_pci_set_phb_table_memory(uint64_t phb_id, uint64_t rtt_addr,
97 uint64_t ivt_addr, uint64_t ivt_len,
98 uint64_t reject_array_addr,
99 uint64_t peltv_addr);
100 int64_t opal_pci_set_pe(uint64_t phb_id, uint64_t pe_number, uint64_t bus_dev_func,
103 int64_t opal_pci_set_peltv(uint64_t phb_id, uint32_t parent_pe, uint32_t child_pe,
105 int64_t opal_pci_set_mve(uint64_t phb_id, uint32_t mve_number, uint32_t pe_number);
106 int64_t opal_pci_set_mve_enable(uint64_t phb_id, uint32_t mve_number,
108 int64_t opal_pci_get_xive_reissue(uint64_t phb_id, uint32_t xive_number,
110 int64_t opal_pci_set_xive_reissue(uint64_t phb_id, uint32_t xive_number,
112 int64_t opal_pci_msi_eoi(uint64_t phb_id, uint32_t hw_irq);
113 int64_t opal_pci_set_xive_pe(uint64_t phb_id, uint32_t pe_number,
115 int64_t opal_get_xive_source(uint64_t phb_id, uint32_t xive_num,
117 int64_t opal_get_msi_32(uint64_t phb_id, uint32_t mve_number, uint32_t xive_num,
120 int64_t opal_get_msi_64(uint64_t phb_id, uint32_t mve_number,
123 int64_t opal_start_cpu(uint64_t thread_number, uint64_t start_address);
124 int64_t opal_query_cpu_status(uint64_t thread_number, uint8_t *thread_status);
125 int64_t opal_write_oppanel(oppanel_line_t *lines, uint64_t num_lines);
126 int64_t opal_pci_map_pe_dma_window(uint64_t phb_id, uint16_t pe_number, uint16_t window_id,
127 uint16_t tce_levels, uint64_t tce_table_addr,
128 uint64_t tce_table_size, uint64_t tce_page_size);
129 int64_t opal_pci_map_pe_dma_window_real(uint64_t phb_id, uint16_t pe_number,
130 uint16_t dma_window_number, uint64_t pci_start_addr,
131 uint64_t pci_mem_size);
132 int64_t opal_pci_reset(uint64_t phb_id, uint8_t reset_scope, uint8_t assert_state);
134 int64_t opal_pci_get_hub_diag_data(uint64_t hub_id, void *diag_buffer,
135 uint64_t diag_buffer_len);
136 int64_t opal_pci_get_phb_diag_data(uint64_t phb_id, void *diag_buffer,
137 uint64_t diag_buffer_len);
138 int64_t opal_pci_get_phb_diag_data2(uint64_t phb_id, void *diag_buffer,
139 uint64_t diag_buffer_len);
140 int64_t opal_pci_fence_phb(uint64_t phb_id);
141 int64_t opal_pci_reinit(uint64_t phb_id, uint64_t reinit_scope, uint64_t data);
142 int64_t opal_pci_mask_pe_error(uint64_t phb_id, uint16_t pe_number, uint8_t error_type, uint8_t mas…
143 int64_t opal_set_slot_led_status(uint64_t phb_id, uint64_t slot_id, uint8_t led_type, uint8_t led_a…
146 int64_t opal_pci_next_error(uint64_t phb_id, __be64 *first_frozen_pe,
148 int64_t opal_pci_poll(uint64_t phb_id);
150 int64_t opal_check_token(uint64_t token);
151 int64_t opal_reinit_cpus(uint64_t flags);
153 int64_t opal_xscom_read(uint32_t gcid, uint64_t pcb_addr, __be64 *val);
154 int64_t opal_xscom_write(uint32_t gcid, uint64_t pcb_addr, uint64_t val);
161 int64_t opal_read_elog(uint64_t buffer, uint64_t size, uint64_t log_id);
163 int64_t opal_write_elog(uint64_t buffer, uint64_t size, uint64_t offset);
164 int64_t opal_send_ack_elog(uint64_t log_id);
167 int64_t opal_validate_flash(uint64_t buffer, uint32_t *size, uint32_t *result);
169 int64_t opal_update_flash(uint64_t blk_list);
173 int64_t opal_dump_read(uint32_t dump_id, uint64_t buffer);
177 int64_t opal_get_msg(uint64_t buffer, uint64_t size);
178 int64_t opal_check_completion(uint64_t buffer, uint64_t size, uint64_t token);
180 int64_t opal_get_param(uint64_t token, uint32_t param_id, uint64_t buffer,
181 uint64_t length);
182 int64_t opal_set_param(uint64_t token, uint32_t param_id, uint64_t buffer,
183 uint64_t length);
186 int64_t opal_register_dump_region(uint32_t id, uint64_t start, uint64_t end);
188 int64_t opal_slw_set_reg(uint64_t cpu_pir, uint64_t sprn, uint64_t val);
189 int64_t opal_pci_set_phb_cxl_mode(uint64_t phb_id, uint64_t mode, uint64_t pe_number);
190 int64_t opal_ipmi_send(uint64_t interface, struct opal_ipmi_msg *msg,
191 uint64_t msg_len);
192 int64_t opal_ipmi_recv(uint64_t interface, struct opal_ipmi_msg *msg,
193 uint64_t *msg_len);
194 int64_t opal_i2c_request(uint64_t async_token, uint32_t bus_id,
197 int64_t opal_flash_read(uint64_t id, uint64_t offset, uint64_t buf,
198 uint64_t size, uint64_t token);
199 int64_t opal_flash_write(uint64_t id, uint64_t offset, uint64_t buf,
200 uint64_t size, uint64_t token);
201 int64_t opal_flash_erase(uint64_t id, uint64_t offset, uint64_t size,
202 uint64_t token);
224 extern void opal_notifier_update_evt(uint64_t evt_mask, uint64_t evt_val);
230 extern int opal_async_wait_response(uint64_t token, struct opal_msg *msg);