Lines Matching refs:opcode
44 unsigned params, unsigned opcode,
50 unsigned opcode, unsigned long disp,
53 static void misalignment_MOV_Lcc(struct pt_regs *regs, uint32_t opcode);
154 u_int32_t opcode; member
325 uint32_t opcode, noc, xo, xm; in misalignment() local
351 opcode = byte; in misalignment()
355 npop = ilog2(pop->opcode | pop->opmask); in misalignment()
362 if ((opcode & pop->opmask) == pop->opcode) in misalignment()
365 xo = pop->opcode >> (npop - noc); in misalignment()
368 if ((opcode & xm) != xo) in misalignment()
376 opcode = opcode << 8 | byte; in misalignment()
389 regs->pc, opcode); in misalignment()
414 regs->pc, opcode); in misalignment()
420 regs->pc, opcode); in misalignment()
426 regs->pc, opcode, pop->name); in misalignment()
448 regs->pc, opcode, pop->opcode, pop->params[0], pop->params[1]); in misalignment()
455 opcode >>= tmp; in misalignment()
480 regs->pc, opcode); in misalignment()
496 pop->params[0], opcode, disp, in misalignment()
500 if (!misalignment_reg(registers, pop->params[1], opcode, disp, in misalignment()
516 if (!misalignment_reg(registers, pop->params[0], opcode, disp, in misalignment()
521 pop->params[1], opcode, disp, in misalignment()
540 misalignment_MOV_Lcc(regs, opcode); in misalignment()
549 unsigned params, unsigned opcode, in misalignment_addr() argument
567 postinc = ®isters[Dreg_index[opcode & 0x03]]; in misalignment_addr()
571 postinc = ®isters[Dreg_index[opcode >> 2 & 0x03]]; in misalignment_addr()
575 postinc = ®isters[Dreg_index[opcode >> 4 & 0x03]]; in misalignment_addr()
579 postinc = ®isters[Areg_index[opcode & 0x03]]; in misalignment_addr()
583 postinc = ®isters[Areg_index[opcode >> 2 & 0x03]]; in misalignment_addr()
587 postinc = ®isters[Areg_index[opcode >> 4 & 0x03]]; in misalignment_addr()
591 postinc = ®isters[Rreg_index[opcode & 0x0f]]; in misalignment_addr()
595 postinc = ®isters[Rreg_index[opcode >> 2 & 0x0f]]; in misalignment_addr()
599 postinc = ®isters[Rreg_index[opcode >> 4 & 0x0f]]; in misalignment_addr()
603 postinc = ®isters[Rreg_index[opcode >> 8 & 0x0f]]; in misalignment_addr()
607 postinc = ®isters[Rreg_index[opcode >> 12 & 0x0f]]; in misalignment_addr()
638 tmp = opcode >> 4 & 0x0f; in misalignment_addr()
678 unsigned opcode, unsigned long disp, in misalignment_reg() argument
688 *_register = ®isters[Dreg_index[opcode & 0x03]]; in misalignment_reg()
691 *_register = ®isters[Dreg_index[opcode >> 2 & 0x03]]; in misalignment_reg()
694 *_register = ®isters[Dreg_index[opcode >> 4 & 0x03]]; in misalignment_reg()
697 *_register = ®isters[Areg_index[opcode & 0x03]]; in misalignment_reg()
700 *_register = ®isters[Areg_index[opcode >> 2 & 0x03]]; in misalignment_reg()
703 *_register = ®isters[Areg_index[opcode >> 4 & 0x03]]; in misalignment_reg()
706 *_register = ®isters[Rreg_index[opcode & 0x0f]]; in misalignment_reg()
709 *_register = ®isters[Rreg_index[opcode >> 2 & 0x0f]]; in misalignment_reg()
712 *_register = ®isters[Rreg_index[opcode >> 4 & 0x0f]]; in misalignment_reg()
715 *_register = ®isters[Rreg_index[opcode >> 8 & 0x0f]]; in misalignment_reg()
718 *_register = ®isters[Rreg_index[opcode >> 12 & 0x0f]]; in misalignment_reg()
741 static void misalignment_MOV_Lcc(struct pt_regs *regs, uint32_t opcode) in misalignment_MOV_Lcc() argument
746 kdebug("MOV_Lcc %x [flags=%lx]", opcode, epsw & 0xf); in misalignment_MOV_Lcc()
751 switch (opcode & 0xf) { in misalignment_MOV_Lcc()