Lines Matching refs:base

112 	void __iomem *base = apc->cfg_base;  in ar71xx_pci_check_error()  local
116 pci_err = __raw_readl(base + AR71XX_PCI_REG_PCI_ERR) & 3; in ar71xx_pci_check_error()
121 addr = __raw_readl(base + AR71XX_PCI_REG_PCI_ERR_ADDR); in ar71xx_pci_check_error()
127 __raw_writel(pci_err, base + AR71XX_PCI_REG_PCI_ERR); in ar71xx_pci_check_error()
130 ahb_err = __raw_readl(base + AR71XX_PCI_REG_AHB_ERR) & 1; in ar71xx_pci_check_error()
135 addr = __raw_readl(base + AR71XX_PCI_REG_AHB_ERR_ADDR); in ar71xx_pci_check_error()
141 __raw_writel(ahb_err, base + AR71XX_PCI_REG_AHB_ERR); in ar71xx_pci_check_error()
150 void __iomem *base = apc->cfg_base; in ar71xx_pci_local_write() local
158 __raw_writel(ad_cbe, base + AR71XX_PCI_REG_CRP_AD_CBE); in ar71xx_pci_local_write()
159 __raw_writel(value, base + AR71XX_PCI_REG_CRP_WRDATA); in ar71xx_pci_local_write()
167 void __iomem *base = apc->cfg_base; in ar71xx_pci_set_cfgaddr() local
172 __raw_writel(addr, base + AR71XX_PCI_REG_CFG_AD); in ar71xx_pci_set_cfgaddr()
174 base + AR71XX_PCI_REG_CFG_CBE); in ar71xx_pci_set_cfgaddr()
183 void __iomem *base = apc->cfg_base; in ar71xx_pci_read_config() local
196 data = __raw_readl(base + AR71XX_PCI_REG_CFG_RDDATA); in ar71xx_pci_read_config()
207 void __iomem *base = apc->cfg_base; in ar71xx_pci_write_config() local
219 __raw_writel(value, base + AR71XX_PCI_REG_CFG_WRDATA); in ar71xx_pci_write_config()
232 void __iomem *base = ath79_reset_base; in ar71xx_pci_irq_handler() local
237 pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) & in ar71xx_pci_irq_handler()
238 __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); in ar71xx_pci_irq_handler()
260 void __iomem *base = ath79_reset_base; in ar71xx_pci_irq_unmask() local
266 t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); in ar71xx_pci_irq_unmask()
267 __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); in ar71xx_pci_irq_unmask()
270 __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); in ar71xx_pci_irq_unmask()
277 void __iomem *base = ath79_reset_base; in ar71xx_pci_irq_mask() local
283 t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); in ar71xx_pci_irq_mask()
284 __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); in ar71xx_pci_irq_mask()
287 __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); in ar71xx_pci_irq_mask()
299 void __iomem *base = ath79_reset_base; in ar71xx_pci_irq_init() local
302 __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE); in ar71xx_pci_irq_init()
303 __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS); in ar71xx_pci_irq_init()