Lines Matching refs:addr
110 #define _LoadHW(addr, value, res, type) \ argument
129 : "r" (addr), "i" (-EFAULT)); \
133 #define _LoadW(addr, value, res, type) \ argument
150 : "r" (addr), "i" (-EFAULT)); \
155 #define _LoadW(addr, value, res, type) \ argument
185 : "r" (addr), "i" (-EFAULT)); \
190 #define _LoadHWU(addr, value, res, type) \ argument
211 : "r" (addr), "i" (-EFAULT)); \
215 #define _LoadWU(addr, value, res, type) \ argument
234 : "r" (addr), "i" (-EFAULT)); \
237 #define _LoadDW(addr, value, res) \ argument
254 : "r" (addr), "i" (-EFAULT)); \
259 #define _LoadWU(addr, value, res, type) \ argument
289 : "r" (addr), "i" (-EFAULT)); \
292 #define _LoadDW(addr, value, res) \ argument
338 : "r" (addr), "i" (-EFAULT)); \
344 #define _StoreHW(addr, value, res, type) \ argument
364 : "r" (value), "r" (addr), "i" (-EFAULT));\
368 #define _StoreW(addr, value, res, type) \ argument
385 : "r" (value), "r" (addr), "i" (-EFAULT)); \
388 #define _StoreDW(addr, value, res) \ argument
405 : "r" (value), "r" (addr), "i" (-EFAULT)); \
410 #define _StoreW(addr, value, res, type) \ argument
437 : "r" (value), "r" (addr), "i" (-EFAULT) \
441 #define _StoreDW(addr, value, res) \ argument
481 : "r" (value), "r" (addr), "i" (-EFAULT) \
489 #define _LoadHW(addr, value, res, type) \ argument
508 : "r" (addr), "i" (-EFAULT)); \
512 #define _LoadW(addr, value, res, type) \ argument
529 : "r" (addr), "i" (-EFAULT)); \
534 #define _LoadW(addr, value, res, type) \ argument
564 : "r" (addr), "i" (-EFAULT)); \
570 #define _LoadHWU(addr, value, res, type) \ argument
591 : "r" (addr), "i" (-EFAULT)); \
595 #define _LoadWU(addr, value, res, type) \ argument
614 : "r" (addr), "i" (-EFAULT)); \
617 #define _LoadDW(addr, value, res) \ argument
634 : "r" (addr), "i" (-EFAULT)); \
639 #define _LoadWU(addr, value, res, type) \ argument
669 : "r" (addr), "i" (-EFAULT)); \
672 #define _LoadDW(addr, value, res) \ argument
718 : "r" (addr), "i" (-EFAULT)); \
722 #define _StoreHW(addr, value, res, type) \ argument
742 : "r" (value), "r" (addr), "i" (-EFAULT));\
746 #define _StoreW(addr, value, res, type) \ argument
763 : "r" (value), "r" (addr), "i" (-EFAULT)); \
766 #define _StoreDW(addr, value, res) \ argument
783 : "r" (value), "r" (addr), "i" (-EFAULT)); \
788 #define _StoreW(addr, value, res, type) \ argument
815 : "r" (value), "r" (addr), "i" (-EFAULT) \
819 #define _StoreDW(addr, value, res) \ argument
859 : "r" (value), "r" (addr), "i" (-EFAULT) \
866 #define LoadHWU(addr, value, res) _LoadHWU(addr, value, res, kernel) argument
867 #define LoadHWUE(addr, value, res) _LoadHWU(addr, value, res, user) argument
868 #define LoadWU(addr, value, res) _LoadWU(addr, value, res, kernel) argument
869 #define LoadWUE(addr, value, res) _LoadWU(addr, value, res, user) argument
870 #define LoadHW(addr, value, res) _LoadHW(addr, value, res, kernel) argument
871 #define LoadHWE(addr, value, res) _LoadHW(addr, value, res, user) argument
872 #define LoadW(addr, value, res) _LoadW(addr, value, res, kernel) argument
873 #define LoadWE(addr, value, res) _LoadW(addr, value, res, user) argument
874 #define LoadDW(addr, value, res) _LoadDW(addr, value, res) argument
876 #define StoreHW(addr, value, res) _StoreHW(addr, value, res, kernel) argument
877 #define StoreHWE(addr, value, res) _StoreHW(addr, value, res, user) argument
878 #define StoreW(addr, value, res) _StoreW(addr, value, res, kernel) argument
879 #define StoreWE(addr, value, res) _StoreW(addr, value, res, user) argument
880 #define StoreDW(addr, value, res) _StoreDW(addr, value, res) argument
883 void __user *addr, unsigned int __user *pc) in emulate_load_store_insn() argument
949 if (!access_ok(VERIFY_READ, addr, 2)) { in emulate_load_store_insn()
953 LoadHWE(addr, value, res); in emulate_load_store_insn()
962 if (!access_ok(VERIFY_READ, addr, 4)) { in emulate_load_store_insn()
966 LoadWE(addr, value, res); in emulate_load_store_insn()
975 if (!access_ok(VERIFY_READ, addr, 2)) { in emulate_load_store_insn()
979 LoadHWUE(addr, value, res); in emulate_load_store_insn()
988 if (!access_ok(VERIFY_WRITE, addr, 2)) { in emulate_load_store_insn()
994 StoreHWE(addr, value, res); in emulate_load_store_insn()
1001 if (!access_ok(VERIFY_WRITE, addr, 4)) { in emulate_load_store_insn()
1007 StoreWE(addr, value, res); in emulate_load_store_insn()
1021 if (!access_ok(VERIFY_READ, addr, 2)) in emulate_load_store_insn()
1026 LoadHW(addr, value, res); in emulate_load_store_insn()
1028 LoadHWE(addr, value, res); in emulate_load_store_insn()
1030 LoadHW(addr, value, res); in emulate_load_store_insn()
1040 if (!access_ok(VERIFY_READ, addr, 4)) in emulate_load_store_insn()
1045 LoadW(addr, value, res); in emulate_load_store_insn()
1047 LoadWE(addr, value, res); in emulate_load_store_insn()
1049 LoadW(addr, value, res); in emulate_load_store_insn()
1059 if (!access_ok(VERIFY_READ, addr, 2)) in emulate_load_store_insn()
1064 LoadHWU(addr, value, res); in emulate_load_store_insn()
1066 LoadHWUE(addr, value, res); in emulate_load_store_insn()
1068 LoadHWU(addr, value, res); in emulate_load_store_insn()
1086 if (!access_ok(VERIFY_READ, addr, 4)) in emulate_load_store_insn()
1089 LoadWU(addr, value, res); in emulate_load_store_insn()
1109 if (!access_ok(VERIFY_READ, addr, 8)) in emulate_load_store_insn()
1112 LoadDW(addr, value, res); in emulate_load_store_insn()
1124 if (!access_ok(VERIFY_WRITE, addr, 2)) in emulate_load_store_insn()
1132 StoreHW(addr, value, res); in emulate_load_store_insn()
1134 StoreHWE(addr, value, res); in emulate_load_store_insn()
1136 StoreHW(addr, value, res); in emulate_load_store_insn()
1144 if (!access_ok(VERIFY_WRITE, addr, 4)) in emulate_load_store_insn()
1152 StoreW(addr, value, res); in emulate_load_store_insn()
1154 StoreWE(addr, value, res); in emulate_load_store_insn()
1156 StoreW(addr, value, res); in emulate_load_store_insn()
1172 if (!access_ok(VERIFY_WRITE, addr, 8)) in emulate_load_store_insn()
1177 StoreDW(addr, value, res); in emulate_load_store_insn()
1275 void __user *addr) in emulate_load_store_microMIPS() argument
1352 if (!access_ok(VERIFY_READ, addr, 8)) in emulate_load_store_microMIPS()
1355 LoadW(addr, value, res); in emulate_load_store_microMIPS()
1359 addr += 4; in emulate_load_store_microMIPS()
1360 LoadW(addr, value, res); in emulate_load_store_microMIPS()
1371 if (!access_ok(VERIFY_WRITE, addr, 8)) in emulate_load_store_microMIPS()
1375 StoreW(addr, value, res); in emulate_load_store_microMIPS()
1378 addr += 4; in emulate_load_store_microMIPS()
1380 StoreW(addr, value, res); in emulate_load_store_microMIPS()
1391 if (!access_ok(VERIFY_READ, addr, 16)) in emulate_load_store_microMIPS()
1394 LoadDW(addr, value, res); in emulate_load_store_microMIPS()
1398 addr += 8; in emulate_load_store_microMIPS()
1399 LoadDW(addr, value, res); in emulate_load_store_microMIPS()
1414 if (!access_ok(VERIFY_WRITE, addr, 16)) in emulate_load_store_microMIPS()
1418 StoreDW(addr, value, res); in emulate_load_store_microMIPS()
1421 addr += 8; in emulate_load_store_microMIPS()
1423 StoreDW(addr, value, res); in emulate_load_store_microMIPS()
1438 (VERIFY_READ, addr, 4 * (rvar + 1))) in emulate_load_store_microMIPS()
1441 if (!access_ok(VERIFY_READ, addr, 4 * rvar)) in emulate_load_store_microMIPS()
1447 LoadW(addr, value, res); in emulate_load_store_microMIPS()
1450 addr += 4; in emulate_load_store_microMIPS()
1454 LoadW(addr, value, res); in emulate_load_store_microMIPS()
1457 addr += 4; in emulate_load_store_microMIPS()
1461 LoadW(addr, value, res); in emulate_load_store_microMIPS()
1475 (VERIFY_WRITE, addr, 4 * (rvar + 1))) in emulate_load_store_microMIPS()
1478 if (!access_ok(VERIFY_WRITE, addr, 4 * rvar)) in emulate_load_store_microMIPS()
1485 StoreW(addr, value, res); in emulate_load_store_microMIPS()
1488 addr += 4; in emulate_load_store_microMIPS()
1492 StoreW(addr, value, res); in emulate_load_store_microMIPS()
1495 addr += 4; in emulate_load_store_microMIPS()
1499 StoreW(addr, value, res); in emulate_load_store_microMIPS()
1513 (VERIFY_READ, addr, 8 * (rvar + 1))) in emulate_load_store_microMIPS()
1516 if (!access_ok(VERIFY_READ, addr, 8 * rvar)) in emulate_load_store_microMIPS()
1523 LoadDW(addr, value, res); in emulate_load_store_microMIPS()
1526 addr += 4; in emulate_load_store_microMIPS()
1530 LoadDW(addr, value, res); in emulate_load_store_microMIPS()
1533 addr += 8; in emulate_load_store_microMIPS()
1537 LoadDW(addr, value, res); in emulate_load_store_microMIPS()
1555 (VERIFY_WRITE, addr, 8 * (rvar + 1))) in emulate_load_store_microMIPS()
1558 if (!access_ok(VERIFY_WRITE, addr, 8 * rvar)) in emulate_load_store_microMIPS()
1566 StoreDW(addr, value, res); in emulate_load_store_microMIPS()
1569 addr += 8; in emulate_load_store_microMIPS()
1573 StoreDW(addr, value, res); in emulate_load_store_microMIPS()
1576 addr += 8; in emulate_load_store_microMIPS()
1580 StoreDW(addr, value, res); in emulate_load_store_microMIPS()
1673 if (!access_ok(VERIFY_READ, addr, 4 * rvar)) in emulate_load_store_microMIPS()
1677 LoadW(addr, value, res); in emulate_load_store_microMIPS()
1680 addr += 4; in emulate_load_store_microMIPS()
1683 LoadW(addr, value, res); in emulate_load_store_microMIPS()
1693 if (!access_ok(VERIFY_WRITE, addr, 4 * rvar)) in emulate_load_store_microMIPS()
1698 StoreW(addr, value, res); in emulate_load_store_microMIPS()
1701 addr += 4; in emulate_load_store_microMIPS()
1704 StoreW(addr, value, res); in emulate_load_store_microMIPS()
1747 if (!access_ok(VERIFY_READ, addr, 2)) in emulate_load_store_microMIPS()
1750 LoadHW(addr, value, res); in emulate_load_store_microMIPS()
1757 if (!access_ok(VERIFY_READ, addr, 2)) in emulate_load_store_microMIPS()
1760 LoadHWU(addr, value, res); in emulate_load_store_microMIPS()
1767 if (!access_ok(VERIFY_READ, addr, 4)) in emulate_load_store_microMIPS()
1770 LoadW(addr, value, res); in emulate_load_store_microMIPS()
1785 if (!access_ok(VERIFY_READ, addr, 4)) in emulate_load_store_microMIPS()
1788 LoadWU(addr, value, res); in emulate_load_store_microMIPS()
1807 if (!access_ok(VERIFY_READ, addr, 8)) in emulate_load_store_microMIPS()
1810 LoadDW(addr, value, res); in emulate_load_store_microMIPS()
1821 if (!access_ok(VERIFY_WRITE, addr, 2)) in emulate_load_store_microMIPS()
1825 StoreHW(addr, value, res); in emulate_load_store_microMIPS()
1831 if (!access_ok(VERIFY_WRITE, addr, 4)) in emulate_load_store_microMIPS()
1835 StoreW(addr, value, res); in emulate_load_store_microMIPS()
1849 if (!access_ok(VERIFY_WRITE, addr, 8)) in emulate_load_store_microMIPS()
1853 StoreDW(addr, value, res); in emulate_load_store_microMIPS()
1895 static void emulate_load_store_MIPS16e(struct pt_regs *regs, void __user * addr) in emulate_load_store_MIPS16e() argument
1972 if (!access_ok(VERIFY_READ, addr, 2)) in emulate_load_store_MIPS16e()
1975 LoadHW(addr, value, res); in emulate_load_store_MIPS16e()
1983 if (!access_ok(VERIFY_READ, addr, 2)) in emulate_load_store_MIPS16e()
1986 LoadHWU(addr, value, res); in emulate_load_store_MIPS16e()
1996 if (!access_ok(VERIFY_READ, addr, 4)) in emulate_load_store_MIPS16e()
1999 LoadW(addr, value, res); in emulate_load_store_MIPS16e()
2015 if (!access_ok(VERIFY_READ, addr, 4)) in emulate_load_store_MIPS16e()
2018 LoadWU(addr, value, res); in emulate_load_store_MIPS16e()
2039 if (!access_ok(VERIFY_READ, addr, 8)) in emulate_load_store_MIPS16e()
2042 LoadDW(addr, value, res); in emulate_load_store_MIPS16e()
2054 if (!access_ok(VERIFY_WRITE, addr, 2)) in emulate_load_store_MIPS16e()
2059 StoreHW(addr, value, res); in emulate_load_store_MIPS16e()
2067 if (!access_ok(VERIFY_WRITE, addr, 4)) in emulate_load_store_MIPS16e()
2072 StoreW(addr, value, res); in emulate_load_store_MIPS16e()
2087 if (!access_ok(VERIFY_WRITE, addr, 8)) in emulate_load_store_MIPS16e()
2092 StoreDW(addr, value, res); in emulate_load_store_MIPS16e()