Lines Matching refs:c
73 static inline void cpu_set_fpu_fcsr_mask(struct cpuinfo_mips *c) in cpu_set_fpu_fcsr_mask() argument
77 fcsr = c->fpu_csr31; in cpu_set_fpu_fcsr_mask()
95 c->fpu_msk31 = ~(fcsr0 ^ fcsr1) & ~mask; in cpu_set_fpu_fcsr_mask()
101 static void cpu_set_nofpu_id(struct cpuinfo_mips *c) in cpu_set_nofpu_id() argument
106 if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1 | in cpu_set_nofpu_id()
110 if (c->isa_level & (MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2 | in cpu_set_nofpu_id()
113 c->fpu_id = value; in cpu_set_nofpu_id()
122 static void cpu_set_fpu_opts(struct cpuinfo_mips *c) in cpu_set_fpu_opts() argument
124 c->fpu_id = cpu_get_fpu_id(); in cpu_set_fpu_opts()
125 mips_nofpu_msk31 = c->fpu_msk31; in cpu_set_fpu_opts()
127 if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1 | in cpu_set_fpu_opts()
130 if (c->fpu_id & MIPS_FPIR_3D) in cpu_set_fpu_opts()
131 c->ases |= MIPS_ASE_MIPS3D; in cpu_set_fpu_opts()
132 if (c->fpu_id & MIPS_FPIR_FREP) in cpu_set_fpu_opts()
133 c->options |= MIPS_CPU_FRE; in cpu_set_fpu_opts()
136 cpu_set_fpu_fcsr_mask(c); in cpu_set_fpu_opts()
142 static void cpu_set_nofpu_opts(struct cpuinfo_mips *c) in cpu_set_nofpu_opts() argument
144 c->options &= ~MIPS_CPU_FPU; in cpu_set_nofpu_opts()
145 c->fpu_msk31 = mips_nofpu_msk31; in cpu_set_nofpu_opts()
147 cpu_set_nofpu_id(c); in cpu_set_nofpu_opts()
191 static void set_ftlb_enable(struct cpuinfo_mips *c, int enable);
247 struct cpuinfo_mips *c = ¤t_cpu_data; in check_errata() local
256 if ((c->processor_id & PRID_REV_MASK) <= PRID_REV_34K_V1_0_2) in check_errata()
297 static inline void cpu_probe_vmbits(struct cpuinfo_mips *c) in cpu_probe_vmbits() argument
302 c->vmbits = fls64(read_c0_entryhi() & 0x3fffffffffffe000ULL); in cpu_probe_vmbits()
306 static void set_isa(struct cpuinfo_mips *c, unsigned int isa) in set_isa() argument
310 c->isa_level |= MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2; in set_isa()
312 c->isa_level |= MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1; in set_isa()
314 c->isa_level |= MIPS_CPU_ISA_V; in set_isa()
316 c->isa_level |= MIPS_CPU_ISA_IV; in set_isa()
318 c->isa_level |= MIPS_CPU_ISA_II | MIPS_CPU_ISA_III; in set_isa()
323 c->isa_level |= MIPS_CPU_ISA_M32R6 | MIPS_CPU_ISA_M64R6; in set_isa()
325 c->isa_level |= MIPS_CPU_ISA_M32R6; in set_isa()
329 c->isa_level |= MIPS_CPU_ISA_M32R2; in set_isa()
331 c->isa_level |= MIPS_CPU_ISA_M32R1; in set_isa()
333 c->isa_level |= MIPS_CPU_ISA_II; in set_isa()
341 static unsigned int calculate_ftlb_probability(struct cpuinfo_mips *c) in calculate_ftlb_probability() argument
344 unsigned int probability = c->tlbsize / c->tlbsizevtlb; in calculate_ftlb_probability()
367 static void set_ftlb_enable(struct cpuinfo_mips *c, int enable) in set_ftlb_enable() argument
372 switch (c->cputype) { in set_ftlb_enable()
382 (calculate_ftlb_probability(c) in set_ftlb_enable()
393 static inline unsigned int decode_config0(struct cpuinfo_mips *c) in decode_config0() argument
405 c->options |= MIPS_CPU_TLB; in decode_config0()
412 set_isa(c, MIPS_CPU_ISA_M32R1); in decode_config0()
415 set_isa(c, MIPS_CPU_ISA_M32R2); in decode_config0()
418 set_isa(c, MIPS_CPU_ISA_M32R6); in decode_config0()
427 set_isa(c, MIPS_CPU_ISA_M64R1); in decode_config0()
430 set_isa(c, MIPS_CPU_ISA_M64R2); in decode_config0()
433 set_isa(c, MIPS_CPU_ISA_M64R6); in decode_config0()
449 static inline unsigned int decode_config1(struct cpuinfo_mips *c) in decode_config1() argument
456 c->ases |= MIPS_ASE_MDMX; in decode_config1()
458 c->options |= MIPS_CPU_WATCH; in decode_config1()
460 c->ases |= MIPS_ASE_MIPS16; in decode_config1()
462 c->options |= MIPS_CPU_EJTAG; in decode_config1()
464 c->options |= MIPS_CPU_FPU; in decode_config1()
465 c->options |= MIPS_CPU_32FPR; in decode_config1()
468 c->tlbsize = ((config1 & MIPS_CONF1_TLBS) >> 25) + 1; in decode_config1()
469 c->tlbsizevtlb = c->tlbsize; in decode_config1()
470 c->tlbsizeftlbsets = 0; in decode_config1()
476 static inline unsigned int decode_config2(struct cpuinfo_mips *c) in decode_config2() argument
483 c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT; in decode_config2()
488 static inline unsigned int decode_config3(struct cpuinfo_mips *c) in decode_config3() argument
495 c->ases |= MIPS_ASE_SMARTMIPS; in decode_config3()
496 c->options |= MIPS_CPU_RIXI; in decode_config3()
499 c->options |= MIPS_CPU_RIXI; in decode_config3()
501 c->ases |= MIPS_ASE_DSP; in decode_config3()
503 c->ases |= MIPS_ASE_DSP2P; in decode_config3()
505 c->options |= MIPS_CPU_VINT; in decode_config3()
507 c->options |= MIPS_CPU_VEIC; in decode_config3()
509 c->ases |= MIPS_ASE_MIPSMT; in decode_config3()
511 c->options |= MIPS_CPU_ULRI; in decode_config3()
513 c->options |= MIPS_CPU_MICROMIPS; in decode_config3()
515 c->ases |= MIPS_ASE_VZ; in decode_config3()
517 c->options |= MIPS_CPU_SEGMENTS; in decode_config3()
519 c->ases |= MIPS_ASE_MSA; in decode_config3()
522 c->htw_seq = 0; in decode_config3()
523 c->options |= MIPS_CPU_HTW; in decode_config3()
526 c->options |= MIPS_CPU_CDMM; in decode_config3()
531 static inline unsigned int decode_config4(struct cpuinfo_mips *c) in decode_config4() argument
542 c->options |= MIPS_CPU_TLBINV; in decode_config4()
546 c->tlbsize += (config4 & MIPS_CONF4_MMUSIZEEXT) * 0x40; in decode_config4()
547 c->tlbsizevtlb = c->tlbsize; in decode_config4()
550 c->tlbsizevtlb += in decode_config4()
553 c->tlbsize = c->tlbsizevtlb; in decode_config4()
569 set_ftlb_enable(c, 0); in decode_config4()
572 c->tlbsizeftlbsets = 1 << in decode_config4()
575 c->tlbsizeftlbways = ((config4 & MIPS_CONF4_FTLBWAYS) >> in decode_config4()
577 c->tlbsize += c->tlbsizeftlbways * c->tlbsizeftlbsets; in decode_config4()
583 c->kscratch_mask = (config4 >> 16) & 0xff; in decode_config4()
588 static inline unsigned int decode_config5(struct cpuinfo_mips *c) in decode_config5() argument
597 c->options |= MIPS_CPU_EVA; in decode_config5()
599 c->options |= MIPS_CPU_MAAR; in decode_config5()
601 c->options |= MIPS_CPU_RW_LLB; in decode_config5()
604 c->options |= MIPS_CPU_XPA; in decode_config5()
610 static void decode_configs(struct cpuinfo_mips *c) in decode_configs() argument
615 c->options = MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER | in decode_configs()
618 c->scache.flags = MIPS_CACHE_NOT_PRESENT; in decode_configs()
621 set_ftlb_enable(c, !mips_ftlb_disabled); in decode_configs()
623 ok = decode_config0(c); /* Read Config registers. */ in decode_configs()
626 ok = decode_config1(c); in decode_configs()
628 ok = decode_config2(c); in decode_configs()
630 ok = decode_config3(c); in decode_configs()
632 ok = decode_config4(c); in decode_configs()
634 ok = decode_config5(c); in decode_configs()
636 mips_probe_watch_registers(c); in decode_configs()
644 c->options |= MIPS_CPU_RIXIEX; in decode_configs()
649 c->core = get_ebase_cpunum(); in decode_configs()
651 c->core >>= fls(core_nvpes()) - 1; in decode_configs()
659 static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_legacy() argument
661 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_legacy()
663 c->cputype = CPU_R2000; in cpu_probe_legacy()
665 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS; in cpu_probe_legacy()
666 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE | in cpu_probe_legacy()
669 c->options |= MIPS_CPU_FPU; in cpu_probe_legacy()
670 c->tlbsize = 64; in cpu_probe_legacy()
673 if ((c->processor_id & PRID_REV_MASK) == PRID_REV_R3000A) { in cpu_probe_legacy()
675 c->cputype = CPU_R3081E; in cpu_probe_legacy()
678 c->cputype = CPU_R3000A; in cpu_probe_legacy()
682 c->cputype = CPU_R3000; in cpu_probe_legacy()
685 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS; in cpu_probe_legacy()
686 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE | in cpu_probe_legacy()
689 c->options |= MIPS_CPU_FPU; in cpu_probe_legacy()
690 c->tlbsize = 64; in cpu_probe_legacy()
694 if ((c->processor_id & PRID_REV_MASK) >= in cpu_probe_legacy()
696 c->cputype = CPU_R4400PC; in cpu_probe_legacy()
699 c->cputype = CPU_R4000PC; in cpu_probe_legacy()
723 if ((c->processor_id & PRID_REV_MASK) >= in cpu_probe_legacy()
725 c->cputype = mc ? CPU_R4400MC : CPU_R4400SC; in cpu_probe_legacy()
728 c->cputype = mc ? CPU_R4000MC : CPU_R4000SC; in cpu_probe_legacy()
733 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
734 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
735 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
738 c->tlbsize = 48; in cpu_probe_legacy()
741 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
742 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
743 c->options = R4K_OPTS; in cpu_probe_legacy()
744 c->tlbsize = 32; in cpu_probe_legacy()
745 switch (c->processor_id & 0xf0) { in cpu_probe_legacy()
747 c->cputype = CPU_VR4111; in cpu_probe_legacy()
751 c->cputype = CPU_VR4121; in cpu_probe_legacy()
755 if ((c->processor_id & 0xf) < 0x3) { in cpu_probe_legacy()
756 c->cputype = CPU_VR4122; in cpu_probe_legacy()
759 c->cputype = CPU_VR4181A; in cpu_probe_legacy()
764 if ((c->processor_id & 0xf) < 0x4) { in cpu_probe_legacy()
765 c->cputype = CPU_VR4131; in cpu_probe_legacy()
768 c->cputype = CPU_VR4133; in cpu_probe_legacy()
769 c->options |= MIPS_CPU_LLSC; in cpu_probe_legacy()
775 c->cputype = CPU_VR41XX; in cpu_probe_legacy()
781 c->cputype = CPU_R4300; in cpu_probe_legacy()
783 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
784 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
785 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
787 c->tlbsize = 32; in cpu_probe_legacy()
790 c->cputype = CPU_R4600; in cpu_probe_legacy()
792 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
793 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
794 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
796 c->tlbsize = 48; in cpu_probe_legacy()
806 c->cputype = CPU_R4650; in cpu_probe_legacy()
808 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
809 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
810 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC; in cpu_probe_legacy()
811 c->tlbsize = 48; in cpu_probe_legacy()
815 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS; in cpu_probe_legacy()
816 c->options = MIPS_CPU_TLB | MIPS_CPU_TX39_CACHE; in cpu_probe_legacy()
818 if ((c->processor_id & 0xf0) == (PRID_REV_TX3927 & 0xf0)) { in cpu_probe_legacy()
819 c->cputype = CPU_TX3927; in cpu_probe_legacy()
821 c->tlbsize = 64; in cpu_probe_legacy()
823 switch (c->processor_id & PRID_REV_MASK) { in cpu_probe_legacy()
825 c->cputype = CPU_TX3912; in cpu_probe_legacy()
827 c->tlbsize = 32; in cpu_probe_legacy()
830 c->cputype = CPU_TX3922; in cpu_probe_legacy()
832 c->tlbsize = 64; in cpu_probe_legacy()
838 c->cputype = CPU_R4700; in cpu_probe_legacy()
840 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
841 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
842 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
844 c->tlbsize = 48; in cpu_probe_legacy()
847 c->cputype = CPU_TX49XX; in cpu_probe_legacy()
849 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
850 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
851 c->options = R4K_OPTS | MIPS_CPU_LLSC; in cpu_probe_legacy()
852 if (!(c->processor_id & 0x08)) in cpu_probe_legacy()
853 c->options |= MIPS_CPU_FPU | MIPS_CPU_32FPR; in cpu_probe_legacy()
854 c->tlbsize = 48; in cpu_probe_legacy()
857 c->cputype = CPU_R5000; in cpu_probe_legacy()
859 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
860 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
862 c->tlbsize = 48; in cpu_probe_legacy()
865 c->cputype = CPU_R5432; in cpu_probe_legacy()
867 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
868 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
870 c->tlbsize = 48; in cpu_probe_legacy()
873 c->cputype = CPU_R5500; in cpu_probe_legacy()
875 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
876 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
878 c->tlbsize = 48; in cpu_probe_legacy()
881 c->cputype = CPU_NEVADA; in cpu_probe_legacy()
883 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
884 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
886 c->tlbsize = 48; in cpu_probe_legacy()
889 c->cputype = CPU_R6000; in cpu_probe_legacy()
891 set_isa(c, MIPS_CPU_ISA_II); in cpu_probe_legacy()
892 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS; in cpu_probe_legacy()
893 c->options = MIPS_CPU_TLB | MIPS_CPU_FPU | in cpu_probe_legacy()
895 c->tlbsize = 32; in cpu_probe_legacy()
898 c->cputype = CPU_R6000A; in cpu_probe_legacy()
900 set_isa(c, MIPS_CPU_ISA_II); in cpu_probe_legacy()
901 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS; in cpu_probe_legacy()
902 c->options = MIPS_CPU_TLB | MIPS_CPU_FPU | in cpu_probe_legacy()
904 c->tlbsize = 32; in cpu_probe_legacy()
907 c->cputype = CPU_RM7000; in cpu_probe_legacy()
909 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
910 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
920 c->tlbsize = (read_c0_info() & (1 << 29)) ? 64 : 48; in cpu_probe_legacy()
923 c->cputype = CPU_R8000; in cpu_probe_legacy()
925 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
926 c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX | in cpu_probe_legacy()
929 c->tlbsize = 384; /* has weird TLB: 3-way x 128 */ in cpu_probe_legacy()
932 c->cputype = CPU_R10000; in cpu_probe_legacy()
934 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
935 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX | in cpu_probe_legacy()
939 c->tlbsize = 64; in cpu_probe_legacy()
942 c->cputype = CPU_R12000; in cpu_probe_legacy()
944 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
945 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX | in cpu_probe_legacy()
949 c->tlbsize = 64; in cpu_probe_legacy()
952 if (((c->processor_id >> 4) & 0x0f) > 2) { in cpu_probe_legacy()
953 c->cputype = CPU_R16000; in cpu_probe_legacy()
956 c->cputype = CPU_R14000; in cpu_probe_legacy()
959 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
960 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX | in cpu_probe_legacy()
964 c->tlbsize = 64; in cpu_probe_legacy()
967 switch (c->processor_id & PRID_REV_MASK) { in cpu_probe_legacy()
969 c->cputype = CPU_LOONGSON2; in cpu_probe_legacy()
972 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
973 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
976 c->cputype = CPU_LOONGSON2; in cpu_probe_legacy()
979 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
980 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
983 c->cputype = CPU_LOONGSON3; in cpu_probe_legacy()
986 set_isa(c, MIPS_CPU_ISA_M64R1); in cpu_probe_legacy()
990 c->cputype = CPU_LOONGSON3; in cpu_probe_legacy()
993 set_isa(c, MIPS_CPU_ISA_M64R1); in cpu_probe_legacy()
997 c->options = R4K_OPTS | in cpu_probe_legacy()
1000 c->tlbsize = 64; in cpu_probe_legacy()
1001 c->writecombine = _CACHE_UNCACHED_ACCELERATED; in cpu_probe_legacy()
1004 decode_configs(c); in cpu_probe_legacy()
1006 c->cputype = CPU_LOONGSON1; in cpu_probe_legacy()
1008 switch (c->processor_id & PRID_REV_MASK) { in cpu_probe_legacy()
1018 static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_mips() argument
1020 c->writecombine = _CACHE_UNCACHED_ACCELERATED; in cpu_probe_mips()
1021 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_mips()
1023 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1024 c->cputype = CPU_QEMU_GENERIC; in cpu_probe_mips()
1028 c->cputype = CPU_4KC; in cpu_probe_mips()
1029 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1034 c->cputype = CPU_4KEC; in cpu_probe_mips()
1035 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1040 c->cputype = CPU_4KSC; in cpu_probe_mips()
1041 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1045 c->cputype = CPU_5KC; in cpu_probe_mips()
1046 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1050 c->cputype = CPU_5KE; in cpu_probe_mips()
1051 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1055 c->cputype = CPU_20KC; in cpu_probe_mips()
1056 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1060 c->cputype = CPU_24K; in cpu_probe_mips()
1061 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1065 c->cputype = CPU_24K; in cpu_probe_mips()
1066 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1070 c->cputype = CPU_25KF; in cpu_probe_mips()
1071 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1075 c->cputype = CPU_34K; in cpu_probe_mips()
1076 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1080 c->cputype = CPU_74K; in cpu_probe_mips()
1081 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1085 c->cputype = CPU_M14KC; in cpu_probe_mips()
1086 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1090 c->cputype = CPU_M14KEC; in cpu_probe_mips()
1091 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1095 c->cputype = CPU_1004K; in cpu_probe_mips()
1096 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1100 c->cputype = CPU_1074K; in cpu_probe_mips()
1101 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1105 c->cputype = CPU_INTERAPTIV; in cpu_probe_mips()
1109 c->cputype = CPU_INTERAPTIV; in cpu_probe_mips()
1113 c->cputype = CPU_PROAPTIV; in cpu_probe_mips()
1117 c->cputype = CPU_PROAPTIV; in cpu_probe_mips()
1121 c->cputype = CPU_P5600; in cpu_probe_mips()
1125 c->cputype = CPU_M5150; in cpu_probe_mips()
1130 decode_configs(c); in cpu_probe_mips()
1135 static inline void cpu_probe_alchemy(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_alchemy() argument
1137 decode_configs(c); in cpu_probe_alchemy()
1138 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_alchemy()
1141 c->cputype = CPU_ALCHEMY; in cpu_probe_alchemy()
1142 switch ((c->processor_id >> 24) & 0xff) { in cpu_probe_alchemy()
1157 if ((c->processor_id & PRID_REV_MASK) == 2) in cpu_probe_alchemy()
1171 static inline void cpu_probe_sibyte(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_sibyte() argument
1173 decode_configs(c); in cpu_probe_sibyte()
1175 c->writecombine = _CACHE_UNCACHED_ACCELERATED; in cpu_probe_sibyte()
1176 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_sibyte()
1178 c->cputype = CPU_SB1; in cpu_probe_sibyte()
1181 if ((c->processor_id & PRID_REV_MASK) < 0x02) in cpu_probe_sibyte()
1182 c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR); in cpu_probe_sibyte()
1185 c->cputype = CPU_SB1A; in cpu_probe_sibyte()
1191 static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_sandcraft() argument
1193 decode_configs(c); in cpu_probe_sandcraft()
1194 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_sandcraft()
1196 c->cputype = CPU_SR71000; in cpu_probe_sandcraft()
1198 c->scache.ways = 8; in cpu_probe_sandcraft()
1199 c->tlbsize = 64; in cpu_probe_sandcraft()
1204 static inline void cpu_probe_nxp(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_nxp() argument
1206 decode_configs(c); in cpu_probe_nxp()
1207 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_nxp()
1209 c->cputype = CPU_PR4450; in cpu_probe_nxp()
1211 set_isa(c, MIPS_CPU_ISA_M32R1); in cpu_probe_nxp()
1216 static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_broadcom() argument
1218 decode_configs(c); in cpu_probe_broadcom()
1219 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_broadcom()
1222 c->cputype = CPU_BMIPS32; in cpu_probe_broadcom()
1229 c->cputype = CPU_BMIPS3300; in cpu_probe_broadcom()
1234 int rev = c->processor_id & PRID_REV_MASK; in cpu_probe_broadcom()
1238 c->cputype = CPU_BMIPS4380; in cpu_probe_broadcom()
1242 c->cputype = CPU_BMIPS4350; in cpu_probe_broadcom()
1250 c->cputype = CPU_BMIPS5000; in cpu_probe_broadcom()
1253 c->options |= MIPS_CPU_ULRI; in cpu_probe_broadcom()
1258 static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_cavium() argument
1260 decode_configs(c); in cpu_probe_cavium()
1261 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_cavium()
1265 c->cputype = CPU_CAVIUM_OCTEON; in cpu_probe_cavium()
1272 c->cputype = CPU_CAVIUM_OCTEON_PLUS; in cpu_probe_cavium()
1282 c->cputype = CPU_CAVIUM_OCTEON2; in cpu_probe_cavium()
1288 c->cputype = CPU_CAVIUM_OCTEON3; in cpu_probe_cavium()
1294 c->cputype = CPU_UNKNOWN; in cpu_probe_cavium()
1299 static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_ingenic() argument
1301 decode_configs(c); in cpu_probe_ingenic()
1303 c->options &= ~MIPS_CPU_COUNTER; in cpu_probe_ingenic()
1305 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_ingenic()
1307 c->cputype = CPU_JZRISC; in cpu_probe_ingenic()
1308 c->writecombine = _CACHE_UNCACHED_ACCELERATED; in cpu_probe_ingenic()
1317 static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu) in cpu_probe_netlogic() argument
1319 decode_configs(c); in cpu_probe_netlogic()
1321 if ((c->processor_id & PRID_IMP_MASK) == PRID_IMP_NETLOGIC_AU13XX) { in cpu_probe_netlogic()
1322 c->cputype = CPU_ALCHEMY; in cpu_probe_netlogic()
1328 c->options = (MIPS_CPU_TLB | in cpu_probe_netlogic()
1336 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_netlogic()
1340 c->cputype = CPU_XLP; in cpu_probe_netlogic()
1346 c->cputype = CPU_XLP; in cpu_probe_netlogic()
1358 c->cputype = CPU_XLR; in cpu_probe_netlogic()
1375 c->cputype = CPU_XLR; in cpu_probe_netlogic()
1381 c->processor_id); in cpu_probe_netlogic()
1382 c->cputype = CPU_XLR; in cpu_probe_netlogic()
1386 if (c->cputype == CPU_XLP) { in cpu_probe_netlogic()
1387 set_isa(c, MIPS_CPU_ISA_M64R2); in cpu_probe_netlogic()
1388 c->options |= (MIPS_CPU_FPU | MIPS_CPU_ULRI | MIPS_CPU_MCHECK); in cpu_probe_netlogic()
1390 c->tlbsize = ((read_c0_config6() >> 16) & 0xffff) + 1; in cpu_probe_netlogic()
1392 set_isa(c, MIPS_CPU_ISA_M64R1); in cpu_probe_netlogic()
1393 c->tlbsize = ((read_c0_config1() >> 25) & 0x3f) + 1; in cpu_probe_netlogic()
1395 c->kscratch_mask = 0xf; in cpu_probe_netlogic()
1409 struct cpuinfo_mips *c = ¤t_cpu_data; in cpu_probe() local
1412 c->processor_id = PRID_IMP_UNKNOWN; in cpu_probe()
1413 c->fpu_id = FPIR_IMP_NONE; in cpu_probe()
1414 c->cputype = CPU_UNKNOWN; in cpu_probe()
1415 c->writecombine = _CACHE_UNCACHED; in cpu_probe()
1417 c->fpu_csr31 = FPU_CSR_RN; in cpu_probe()
1418 c->fpu_msk31 = FPU_CSR_RSVD | FPU_CSR_ABS2008 | FPU_CSR_NAN2008; in cpu_probe()
1420 c->processor_id = read_c0_prid(); in cpu_probe()
1421 switch (c->processor_id & PRID_COMP_MASK) { in cpu_probe()
1423 cpu_probe_legacy(c, cpu); in cpu_probe()
1426 cpu_probe_mips(c, cpu); in cpu_probe()
1429 cpu_probe_alchemy(c, cpu); in cpu_probe()
1432 cpu_probe_sibyte(c, cpu); in cpu_probe()
1435 cpu_probe_broadcom(c, cpu); in cpu_probe()
1438 cpu_probe_sandcraft(c, cpu); in cpu_probe()
1441 cpu_probe_nxp(c, cpu); in cpu_probe()
1444 cpu_probe_cavium(c, cpu); in cpu_probe()
1447 cpu_probe_ingenic(c, cpu); in cpu_probe()
1450 cpu_probe_netlogic(c, cpu); in cpu_probe()
1455 BUG_ON(c->cputype == CPU_UNKNOWN); in cpu_probe()
1462 BUG_ON(current_cpu_type() != c->cputype); in cpu_probe()
1465 c->options &= ~MIPS_CPU_FPU; in cpu_probe()
1468 c->ases &= ~(MIPS_ASE_DSP | MIPS_ASE_DSP2P); in cpu_probe()
1471 c->options &= ~MIPS_CPU_HTW; in cpu_probe()
1476 if (c->options & MIPS_CPU_FPU) in cpu_probe()
1477 cpu_set_fpu_opts(c); in cpu_probe()
1479 cpu_set_nofpu_opts(c); in cpu_probe()
1482 c->srsets = ((read_c0_srsctl() >> 26) & 0x0f) + 1; in cpu_probe()
1484 c->options |= MIPS_CPU_PCI; in cpu_probe()
1487 c->srsets = 1; in cpu_probe()
1490 c->msa_id = cpu_get_msa_id(); in cpu_probe()
1491 WARN(c->msa_id & MSA_IR_WRPF, in cpu_probe()
1495 cpu_probe_vmbits(c); in cpu_probe()
1505 struct cpuinfo_mips *c = ¤t_cpu_data; in cpu_report() local
1508 smp_processor_id(), c->processor_id, cpu_name_string()); in cpu_report()
1509 if (c->options & MIPS_CPU_FPU) in cpu_report()
1510 printk(KERN_INFO "FPU revision is: %08x\n", c->fpu_id); in cpu_report()
1512 pr_info("MSA revision is: %08x\n", c->msa_id); in cpu_report()