Lines Matching refs:t0
69 li t0, CAUSEF_IV
70 mtc0 t0, CP0_CAUSE
73 li t0, ST0_CU1 | ST0_CU0
74 mtc0 t0, CP0_STATUS
92 _EXT t0, v0, MIPS_CONF1_IL_SHF, MIPS_CONF1_IL_SZ
93 beqz t0, icache_done
95 sllv t0, t1, t0
107 mul t1, t1, t0
113 add a0, a0, t0
119 _EXT t0, v0, MIPS_CONF1_DL_SHF, MIPS_CONF1_DL_SZ
120 beqz t0, dcache_done
122 sllv t0, t1, t0
134 mul t1, t1, t0
139 subu a1, a1, t0
142 add a0, a0, t0
146 mfc0 t0, CP0_CONFIG
147 ori t0, 0x7
148 xori t0, 0x7
149 or t0, t0, s0
150 mtc0 t0, CP0_CONFIG
154 li t0, 0xff
155 sw t0, GCR_CL_COHERENCE_OFS(v1)
159 la t0, 1f
160 jr t0
228 has_mt t0, 3f
245 1: mfc0 t0, CP0_MVPCONTROL
246 ori t0, t0, MVPCONTROL_VPC
247 mtc0 t0, CP0_MVPCONTROL
250 mfc0 t0, CP0_MVPCONF0
251 srl t0, t0, MVPCONF0_PVPE_SHIFT
252 andi t0, t0, (MVPCONF0_PVPE >> MVPCONF0_PVPE_SHIFT)
253 addiu t7, t0, 1
256 beqz t0, 2f
270 li t0, VPECONF0_MVP
272 or t0, t0, t1
273 mttc0 t0, CP0_VPECONF0
279 li t0, TCHALT_H
280 mttc0 t0, CP0_TCHALT
284 slt t0, t5, t7
285 bnez t0, 1b
289 2: mfc0 t0, CP0_MVPCONTROL
290 xori t0, t0, MVPCONTROL_VPC
291 mtc0 t0, CP0_MVPCONTROL
301 la t0, mips_cm_base
302 lw t0, 0(t0)
305 lw t0, GCR_CL_ID_OFS(t0)
307 mul t0, t0, t1
310 addu t0, t0, t1
337 lw t7, COREBOOTCFG_VPECONFIG(t0)
363 lw t6, COREBOOTCFG_VPEMASK(t0)
368 1: andi t0, t6, 1
369 beqz t0, 2f
373 mfc0 t0, CP0_VPECONTROL
374 ori t0, t0, VPECONTROL_TARGTC
375 xori t0, t0, VPECONTROL_TARGTC
376 or t0, t0, t5
377 mtc0 t0, CP0_VPECONTROL
381 mftc0 t0, CP0_TCHALT
382 beqz t0, 2f
386 li t0, VPEBOOTCFG_SIZE
387 mul t0, t0, t5
388 addu t0, t0, t7
391 lw t1, VPEBOOTCFG_PC(t0)
395 lw t1, VPEBOOTCFG_SP(t0)
399 lw t1, VPEBOOTCFG_GP(t0)
403 mfc0 t0, CP0_CONFIG
404 mttc0 t0, CP0_CONFIG
411 mftc0 t0, CP0_TCSTATUS
413 and t0, t0, t1
414 ori t0, t0, TCSTATUS_A
415 mttc0 t0, CP0_TCSTATUS
421 mftc0 t0, CP0_VPECONF0
422 ori t0, t0, VPECONF0_VPA
423 mttc0 t0, CP0_VPECONF0
439 li t0, 1
440 sll t0, t0, t9
441 and t0, t0, t8
442 bnez t0, 2f
446 li t0, TCHALT_H
447 mtc0 t0, CP0_TCHALT
448 la t0, 1f
449 1: jr.hb t0