Lines Matching refs:r4030_write_reg32
81 r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE, CPHYSADDR(pgtbl)); in vdma_init()
82 r4030_write_reg32(JAZZ_R4030_TRSTBL_LIM, VDMA_PGTBL_SIZE); in vdma_init()
83 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0); in vdma_init()
150 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0); in vdma_alloc()
257 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0); in vdma_remap()
376 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5), in vdma_enable()
384 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5), in vdma_enable()
415 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5), in vdma_disable()
446 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5), in vdma_set_mode()
455 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5), in vdma_set_mode()
476 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5), in vdma_set_mode()
483 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5), in vdma_set_mode()
507 r4030_write_reg32(JAZZ_R4030_CHNL_ADDR + (channel << 5), addr); in vdma_set_addr()
521 r4030_write_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5), count); in vdma_set_count()