91 #define BUILD_CM_R_(name, off)					\  argument
94 	return (u32 __iomem *)(mips_cm_base + (off));		\
102 #define BUILD_CM__W(name, off)					\  argument
108 #define BUILD_CM_RW(name, off)					\  argument
109 	BUILD_CM_R_(name, off)					\
110 	BUILD_CM__W(name, off)
112 #define BUILD_CM_Cx_R_(name, off)				\  argument
113 	BUILD_CM_R_(cl_##name, MIPS_CM_CLCB_OFS + (off))	\
114 	BUILD_CM_R_(co_##name, MIPS_CM_COCB_OFS + (off))
116 #define BUILD_CM_Cx__W(name, off)				\  argument
117 	BUILD_CM__W(cl_##name, MIPS_CM_CLCB_OFS + (off))	\
118 	BUILD_CM__W(co_##name, MIPS_CM_COCB_OFS + (off))
120 #define BUILD_CM_Cx_RW(name, off)				\  argument
121 	BUILD_CM_Cx_R_(name, off)				\
122 	BUILD_CM_Cx__W(name, off)