Lines Matching refs:BIT
37 #define JZ_TIMER_IRQ_HALF(x) BIT((x) + 0x10)
38 #define JZ_TIMER_IRQ_FULL(x) BIT(x)
40 #define JZ_TIMER_CTRL_PWM_ABBRUPT_SHUTDOWN BIT(9)
41 #define JZ_TIMER_CTRL_PWM_ACTIVE_LOW BIT(8)
42 #define JZ_TIMER_CTRL_PWM_ENABLE BIT(7)
54 #define JZ_TIMER_CTRL_SRC_EXT BIT(2)
55 #define JZ_TIMER_CTRL_SRC_RTC BIT(1)
56 #define JZ_TIMER_CTRL_SRC_PCLK BIT(0)
66 writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_SET); in jz4740_timer_stop()
71 writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR); in jz4740_timer_start()
76 return readb(jz4740_timer_base + JZ_REG_TIMER_ENABLE) & BIT(timer); in jz4740_timer_is_enabled()
81 writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_SET); in jz4740_timer_enable()
86 writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_CLEAR); in jz4740_timer_disable()