109 	void __iomem *io;  member
160 	__raw_writel(DMA_BE0, chan->io + DMA_MODE_SET);  in enable_dma_buffer0()
169 	__raw_writel(DMA_BE1, chan->io + DMA_MODE_SET);  in enable_dma_buffer1()
177 	__raw_writel(DMA_BE0 | DMA_BE1, chan->io + DMA_MODE_SET);  in enable_dma_buffers()
186 	__raw_writel(DMA_GO, chan->io + DMA_MODE_SET);  in start_dma()
198 	__raw_writel(DMA_GO, chan->io + DMA_MODE_CLEAR);  in halt_dma()
202 		if (__raw_readl(chan->io + DMA_MODE_READ) & DMA_HALT)  in halt_dma()
218 	__raw_writel(~DMA_GO, chan->io + DMA_MODE_CLEAR);  in disable_dma()
227 	return (__raw_readl(chan->io + DMA_MODE_READ) & DMA_HALT) ? 1 : 0;  in dma_halted()
242 	__raw_writel(CPHYSADDR(chan->fifo_addr), chan->io + DMA_PERIPHERAL_ADDR);  in init_dma()
248 	__raw_writel(~mode, chan->io + DMA_MODE_CLEAR);  in init_dma()
249 	__raw_writel(mode,	 chan->io + DMA_MODE_SET);  in init_dma()
286 	return (__raw_readl(chan->io + DMA_MODE_READ) & DMA_AB) ? 1 : 0;  in get_dma_active_buffer()
307 	__raw_writel(CPHYSADDR(a), chan->io + DMA_PERIPHERAL_ADDR);  in set_dma_fifo_addr()
319 	__raw_writel(DMA_D0, chan->io + DMA_MODE_CLEAR);  in clear_dma_done0()
328 	__raw_writel(DMA_D1, chan->io + DMA_MODE_CLEAR);  in clear_dma_done1()
347 	__raw_writel(a, chan->io + DMA_BUFFER0_START);  in set_dma_addr0()
359 	__raw_writel(a, chan->io + DMA_BUFFER1_START);  in set_dma_addr1()
373 	__raw_writel(count, chan->io + DMA_BUFFER0_COUNT);  in set_dma_count0()
386 	__raw_writel(count, chan->io + DMA_BUFFER1_COUNT);  in set_dma_count1()
399 	__raw_writel(count, chan->io + DMA_BUFFER0_COUNT);  in set_dma_count()
400 	__raw_writel(count, chan->io + DMA_BUFFER1_COUNT);  in set_dma_count()
413 	return __raw_readl(chan->io + DMA_MODE_READ) & (DMA_D0 | DMA_D1);  in get_dma_buffer_done()
440 	curBufCntReg = (__raw_readl(chan->io + DMA_MODE_READ) & DMA_AB) ?  in get_dma_residue()
443 	count = __raw_readl(chan->io + curBufCntReg) & DMA_COUNT_MASK;  in get_dma_residue()