34 	void __iomem *base = ath79_gpio_base;  in __ath79_gpio_set_value()  local
37 		__raw_writel(1 << gpio, base + AR71XX_GPIO_REG_SET);  in __ath79_gpio_set_value()
39 		__raw_writel(1 << gpio, base + AR71XX_GPIO_REG_CLEAR);  in __ath79_gpio_set_value()
61 	void __iomem *base = ath79_gpio_base;  in ath79_gpio_direction_input()  local
66 	__raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << offset),  in ath79_gpio_direction_input()
67 		     base + AR71XX_GPIO_REG_OE);  in ath79_gpio_direction_input()
77 	void __iomem *base = ath79_gpio_base;  in ath79_gpio_direction_output()  local
83 		__raw_writel(1 << offset, base + AR71XX_GPIO_REG_SET);  in ath79_gpio_direction_output()
85 		__raw_writel(1 << offset, base + AR71XX_GPIO_REG_CLEAR);  in ath79_gpio_direction_output()
87 	__raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << offset),  in ath79_gpio_direction_output()
88 		     base + AR71XX_GPIO_REG_OE);  in ath79_gpio_direction_output()
97 	void __iomem *base = ath79_gpio_base;  in ar934x_gpio_direction_input()  local
102 	__raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << offset),  in ar934x_gpio_direction_input()
103 		     base + AR71XX_GPIO_REG_OE);  in ar934x_gpio_direction_input()
113 	void __iomem *base = ath79_gpio_base;  in ar934x_gpio_direction_output()  local
119 		__raw_writel(1 << offset, base + AR71XX_GPIO_REG_SET);  in ar934x_gpio_direction_output()
121 		__raw_writel(1 << offset, base + AR71XX_GPIO_REG_CLEAR);  in ar934x_gpio_direction_output()
123 	__raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << offset),  in ar934x_gpio_direction_output()
124 		     base + AR71XX_GPIO_REG_OE);  in ar934x_gpio_direction_output()
137 	.base			= 0,