217 static u32 __init ar934x_get_pll_freq(u32 ref, u32 ref_div, u32 nint, u32 nfrac,  in ar934x_get_pll_freq()  argument
225 	do_div(t, ref_div);  in ar934x_get_pll_freq()
230 	do_div(t, ref_div * frac);  in ar934x_get_pll_freq()
243 	u32 pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv;  in ar934x_clocks_init()  local
264 		ref_div = (pll >> AR934X_SRIF_DPLL1_REFDIV_SHIFT) &  in ar934x_clocks_init()
271 		ref_div = (pll >> AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT) &  in ar934x_clocks_init()
280 	cpu_pll = ar934x_get_pll_freq(ref_rate, ref_div, nint,  in ar934x_clocks_init()
291 		ref_div = (pll >> AR934X_SRIF_DPLL1_REFDIV_SHIFT) &  in ar934x_clocks_init()
298 		ref_div = (pll >> AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT) &  in ar934x_clocks_init()
307 	ddr_pll = ar934x_get_pll_freq(ref_rate, ref_div, nint,  in ar934x_clocks_init()
359 	u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv;  in qca955x_clocks_init()  local
372 	ref_div = (pll >> QCA955X_PLL_CPU_CONFIG_REFDIV_SHIFT) &  in qca955x_clocks_init()
379 	cpu_pll = nint * ref_rate / ref_div;  in qca955x_clocks_init()
380 	cpu_pll += frac * ref_rate / (ref_div * (1 << 6));  in qca955x_clocks_init()
386 	ref_div = (pll >> QCA955X_PLL_DDR_CONFIG_REFDIV_SHIFT) &  in qca955x_clocks_init()
393 	ddr_pll = nint * ref_rate / ref_div;  in qca955x_clocks_init()
394 	ddr_pll += frac * ref_rate / (ref_div * (1 << 10));  in qca955x_clocks_init()