Lines Matching refs:div
59 u32 div; in ar71xx_clocks_init() local
65 div = ((pll >> AR71XX_PLL_DIV_SHIFT) & AR71XX_PLL_DIV_MASK) + 1; in ar71xx_clocks_init()
66 freq = div * ref_rate; in ar71xx_clocks_init()
68 div = ((pll >> AR71XX_CPU_DIV_SHIFT) & AR71XX_CPU_DIV_MASK) + 1; in ar71xx_clocks_init()
69 cpu_rate = freq / div; in ar71xx_clocks_init()
71 div = ((pll >> AR71XX_DDR_DIV_SHIFT) & AR71XX_DDR_DIV_MASK) + 1; in ar71xx_clocks_init()
72 ddr_rate = freq / div; in ar71xx_clocks_init()
74 div = (((pll >> AR71XX_AHB_DIV_SHIFT) & AR71XX_AHB_DIV_MASK) + 1) * 2; in ar71xx_clocks_init()
75 ahb_rate = cpu_rate / div; in ar71xx_clocks_init()
94 u32 div; in ar724x_clocks_init() local
99 div = ((pll >> AR724X_PLL_DIV_SHIFT) & AR724X_PLL_DIV_MASK); in ar724x_clocks_init()
100 freq = div * ref_rate; in ar724x_clocks_init()
102 div = ((pll >> AR724X_PLL_REF_DIV_SHIFT) & AR724X_PLL_REF_DIV_MASK); in ar724x_clocks_init()
103 freq *= div; in ar724x_clocks_init()
107 div = ((pll >> AR724X_DDR_DIV_SHIFT) & AR724X_DDR_DIV_MASK) + 1; in ar724x_clocks_init()
108 ddr_rate = freq / div; in ar724x_clocks_init()
110 div = (((pll >> AR724X_AHB_DIV_SHIFT) & AR724X_AHB_DIV_MASK) + 1) * 2; in ar724x_clocks_init()
111 ahb_rate = cpu_rate / div; in ar724x_clocks_init()
130 u32 div; in ar913x_clocks_init() local
135 div = ((pll >> AR913X_PLL_DIV_SHIFT) & AR913X_PLL_DIV_MASK); in ar913x_clocks_init()
136 freq = div * ref_rate; in ar913x_clocks_init()
140 div = ((pll >> AR913X_DDR_DIV_SHIFT) & AR913X_DDR_DIV_MASK) + 1; in ar913x_clocks_init()
141 ddr_rate = freq / div; in ar913x_clocks_init()
143 div = (((pll >> AR913X_AHB_DIV_SHIFT) & AR913X_AHB_DIV_MASK) + 1) * 2; in ar913x_clocks_init()
144 ahb_rate = cpu_rate / div; in ar913x_clocks_init()