Lines Matching refs:bus_clk
100 static struct clk bus_clk = { variable
222 int base_clock = bus_clk.rate; in tnetd7300_set_clock()
226 base_clock = bus_clk.rate; in tnetd7300_set_clock()
257 bus_clk.rate = tnetd7300_get_clock(BUS_PLL_SOURCE_SHIFT, in tnetd7300_init_clocks()
264 cpu_clk.rate = bus_clk.rate; in tnetd7300_init_clocks()
353 bus_clk.rate = in tnetd7200_init_clocks()
357 bus_clk.rate); in tnetd7200_init_clocks()
384 bus_clk.rate = cpu_clk.rate / 2; in tnetd7200_init_clocks()
387 dsp_mul * 2, bus_clk.rate); in tnetd7200_init_clocks()
394 bus_clk.rate = ((dsp_base / dsp_prediv) * dsp_mul) in tnetd7200_init_clocks()
398 dsp_mul * 2, bus_clk.rate); in tnetd7200_init_clocks()
400 cpu_clk.rate = bus_clk.rate; in tnetd7200_init_clocks()
404 usb_base = bus_clk.rate; in tnetd7200_init_clocks()
440 return &bus_clk; in clk_get()
474 vbus_clk.rate = bus_clk.rate / 2; in ar7_init_clocks()