40 	struct pci_controller *hose;  in xilinx_pci_fixup_bridge()  local
46 	hose = pci_bus_to_host(dev->bus);  in xilinx_pci_fixup_bridge()
47 	if (!hose)  in xilinx_pci_fixup_bridge()
50 	if (!of_match_node(xilinx_pci_match, hose->dn))  in xilinx_pci_fixup_bridge()
75 xilinx_pci_exclude_device(struct pci_controller *hose, u_char bus, u8 devfn)  in xilinx_pci_exclude_device()  argument
85 static void __init xilinx_early_pci_scan(struct pci_controller *hose)  in xilinx_early_pci_scan()  argument
98 				early_read_config_dword(hose, bus,  in xilinx_early_pci_scan()
114 static void __init xilinx_early_pci_scan(struct pci_controller *hose)  in xilinx_early_pci_scan()  argument
124 	struct pci_controller *hose;  in xilinx_pci_init()  local
138 	hose = pcibios_alloc_controller(pci_node);  in xilinx_pci_init()
139 	if (!hose) {  in xilinx_pci_init()
145 	setup_indirect_pci(hose, r.start + XPLB_PCI_ADDR,  in xilinx_pci_init()
153 	early_write_config_word(hose, 0, 0, PCI_COMMAND, PCI_HOST_ENABLE_CMD);  in xilinx_pci_init()
156 	early_write_config_byte(hose, 0, 0, PCI_LATENCY_TIMER, 0xff);  in xilinx_pci_init()
164 	pci_process_bridge_OF_ranges(hose, pci_node,  in xilinx_pci_init()
168 	xilinx_early_pci_scan(hose);  in xilinx_pci_init()