Lines Matching refs:swi
54 swi r1, r0, PER_CPU(ENTRY_SP) /* save the current sp */
55 swi r11, r0, PER_CPU(R11_SAVE) /* temporarily save r11 */
67 swi r11, r1, PT_MODE /* store the mode */
69 swi r2, r1, PT_R2
70 swi r3, r1, PT_R3
71 swi r4, r1, PT_R4
72 swi r5, r1, PT_R5
73 swi r6, r1, PT_R6
74 swi r7, r1, PT_R7
75 swi r8, r1, PT_R8
76 swi r9, r1, PT_R9
77 swi r10, r1, PT_R10
78 swi r11, r1, PT_R11
79 swi r12, r1, PT_R12
80 swi r13, r1, PT_R13
81 swi r14, r1, PT_R14
82 swi r14, r1, PT_PC
83 swi r15, r1, PT_R15
84 swi r16, r1, PT_R16
85 swi r17, r1, PT_R17
86 swi r18, r1, PT_R18
87 swi r19, r1, PT_R19
88 swi r20, r1, PT_R20
89 swi r21, r1, PT_R21
90 swi r22, r1, PT_R22
91 swi r23, r1, PT_R23
92 swi r24, r1, PT_R24
93 swi r25, r1, PT_R25
94 swi r26, r1, PT_R26
95 swi r27, r1, PT_R27
96 swi r28, r1, PT_R28
97 swi r29, r1, PT_R29
98 swi r30, r1, PT_R30
99 swi r31, r1, PT_R31
102 swi r11, r1, PT_MSR
104 swi r11, r1, PT_EAR
106 swi r11, r1, PT_ESR
108 swi r11, r1, PT_FSR
111 swi r11, r1, PT_R1
114 swi r11, r0, PER_CPU(KM)
150 swi r11, r0, PER_CPU(KM)
153 swi r31, r0, PER_CPU(CURRENT_SAVE)
203 swi r1, r0, PER_CPU(ENTRY_SP) /* save the current sp */
204 swi r11, r0, PER_CPU(R11_SAVE) /* temporarily save r11 */
216 swi r11, r1, PT_MODE /* store the mode */
219 swi r2, r1, PT_R2
220 swi r3, r1, PT_R3 /* r3: _always_ in clobber list; see unistd.h */
221 swi r4, r1, PT_R4 /* r4: _always_ in clobber list; see unistd.h */
222 swi r5, r1, PT_R5
223 swi r6, r1, PT_R6
224 swi r7, r1, PT_R7
225 swi r8, r1, PT_R8
226 swi r9, r1, PT_R9
227 swi r10, r1, PT_R10
228 swi r11, r1, PT_R11
230 swi r12, r1, PT_R12
231 swi r13, r1, PT_R13
233 swi r14, r1, PT_R14
236 swi r14, r1, PT_PC /* increment by 4 and store in pc */
237 swi r15, r1, PT_R15
238 swi r16, r1, PT_R16
239 swi r17, r1, PT_R17
240 swi r18, r1, PT_R18
241 swi r19, r1, PT_R19
242 swi r20, r1, PT_R20
243 swi r21, r1, PT_R21
244 swi r22, r1, PT_R22
245 swi r23, r1, PT_R23
246 swi r24, r1, PT_R24
247 swi r25, r1, PT_R25
248 swi r26, r1, PT_R26
249 swi r27, r1, PT_R27
250 swi r28, r1, PT_R28
251 swi r29, r1, PT_R29
252 swi r30, r1, PT_R30
253 swi r31, r1, PT_R31
262 swi r11, r1, PT_MSR
264 swi r11, r1, PT_EAR
266 swi r11, r1, PT_ESR
268 swi r11, r1, PT_FSR
271 swi r11, r1, PT_R1
274 swi r11, r0, PER_CPU(KM)
302 swi r1, r0, PER_CPU(ENTRY_SP) /* save the current sp */
306 swi r11, r0, PER_CPU(R11_SAVE) /* temporarily save r11 */
309 swi r11, r1, PT_MODE /* store the mode */
312 swi r2, r1, PT_R2
313 swi r3, r1, PT_R3 /* r3: _always_ in clobber list; see unistd.h */
314 swi r4, r1, PT_R4 /* r4: _always_ in clobber list; see unistd.h */
315 swi r5, r1, PT_R5
316 swi r6, r1, PT_R6
317 swi r7, r1, PT_R7
318 swi r8, r1, PT_R8
319 swi r9, r1, PT_R9
320 swi r10, r1, PT_R10
321 swi r11, r1, PT_R11
323 swi r12, r1, PT_R12
324 swi r13, r1, PT_R13
326 swi r14, r1, PT_R14
327 swi r14, r1, PT_PC /* Will return to interrupted instruction */
328 swi r15, r1, PT_R15
329 swi r16, r1, PT_R16
330 swi r17, r1, PT_R17
331 swi r18, r1, PT_R18
332 swi r19, r1, PT_R19
333 swi r20, r1, PT_R20
334 swi r21, r1, PT_R21
335 swi r22, r1, PT_R22
336 swi r23, r1, PT_R23
337 swi r24, r1, PT_R24
338 swi r25, r1, PT_R25
339 swi r26, r1, PT_R26
340 swi r27, r1, PT_R27
341 swi r28, r1, PT_R28
342 swi r29, r1, PT_R29
343 swi r30, r1, PT_R30
344 swi r31, r1, PT_R31
353 swi r11, r1, PT_MSR
355 swi r11, r1, PT_EAR
357 swi r11, r1, PT_ESR
359 swi r11, r1, PT_FSR
362 swi r11, r1, PT_R1
365 swi r11, r0, PER_CPU(KM)
394 swi r1, r11, CC_R1
395 swi r2, r11, CC_R2
399 swi r13, r11, CC_R13
400 swi r14, r11, CC_R14
401 swi r15, r11, CC_R15
402 swi r16, r11, CC_R16
403 swi r17, r11, CC_R17
404 swi r18, r11, CC_R18
406 swi r19, r11, CC_R19
407 swi r20, r11, CC_R20
408 swi r21, r11, CC_R21
409 swi r22, r11, CC_R22
410 swi r23, r11, CC_R23
411 swi r24, r11, CC_R24
412 swi r25, r11, CC_R25
413 swi r26, r11, CC_R26
414 swi r27, r11, CC_R27
415 swi r28, r11, CC_R28
416 swi r29, r11, CC_R29
417 swi r30, r11, CC_R30
420 swi r12, r11, CC_MSR
422 swi r12, r11, CC_EAR
424 swi r12, r11, CC_ESR
426 swi r12, r11, CC_FSR
430 swi r31, r0, PER_CPU(CURRENT_SAVE)
475 swi r31, r1, PT_R31 /* save r31 in user context. */
514 swi r4, r1, PT_R4 /* return val */
515 swi r3, r1, PT_R3 /* return val */
525 swi r31, r0, PER_CPU(CURRENT_SAVE)
528 swi r18, r0, PER_CPU(KM)