Lines Matching defs:x
192 #define MCF_CCM_CCR_BOOTPS(x) (((x)&0x0003)<<3|0x0001) argument
195 #define MCF_CCM_CCR_CSC(x) (((x)&0x0003)<<8|0x0001) argument
201 #define MCF_CCM_RCON_BOOTPS(x) (((x)&0x0003)<<3|0x0001) argument
204 #define MCF_CCM_RCON_CSC(x) (((x)&0x0003)<<8|0x0001) argument
207 #define MCF_CCM_CIR_PRN(x) (((x)&0x003F)<<0) argument
208 #define MCF_CCM_CIR_PIN(x) (((x)&0x03FF)<<6) argument
222 #define MCF_CCM_CDR_SSIDIV(x) (((x)&0x000F)<<0) argument
223 #define MCF_CCM_CDR_LPDIV(x) (((x)&0x000F)<<8) argument
229 #define MCF_CCM_UHCSR_PORTIND(x) (((x)&0x0003)<<14) argument
246 #define MCF_CCM_UOCSR_PORTIND(x) (((x)&0x0003)<<14) argument
275 #define MCF_FBCS_CSAR_BA(x) ((x)&0xFFFF0000) argument
280 #define MCF_FBCS_CSMR_BAM(x) (((x)&0x0000FFFF)<<16) argument
305 #define MCF_FBCS_CSCR_PS(x) (((x)&0x00000003)<<6) argument
308 #define MCF_FBCS_CSCR_WS(x) (((x)&0x0000003F)<<10) argument
309 #define MCF_FBCS_CSCR_WRAH(x) (((x)&0x00000003)<<16) argument
310 #define MCF_FBCS_CSCR_RDAH(x) (((x)&0x00000003)<<18) argument
311 #define MCF_FBCS_CSCR_ASET(x) (((x)&0x00000003)<<20) argument
313 #define MCF_FBCS_CSCR_SWS(x) (((x)&0x0000003F)<<26) argument
893 #define MCF_GPIO_PAR_FEC_PAR_FEC_MII(x) (((x)&0x03)<<0) argument
894 #define MCF_GPIO_PAR_FEC_PAR_FEC_7W(x) (((x)&0x03)<<2) argument
903 #define MCF_GPIO_PAR_PWM_PAR_PWM1(x) (((x)&0x03)<<0) argument
904 #define MCF_GPIO_PAR_PWM_PAR_PWM3(x) (((x)&0x03)<<2) argument
909 #define MCF_GPIO_PAR_BUSCTL_PAR_TS(x) (((x)&0x03)<<3) argument
924 #define MCF_GPIO_PAR_FECI2C_PAR_SDA(x) (((x)&0x03)<<0) argument
925 #define MCF_GPIO_PAR_FECI2C_PAR_SCL(x) (((x)&0x03)<<2) argument
926 #define MCF_GPIO_PAR_FECI2C_PAR_MDIO(x) (((x)&0x03)<<4) argument
927 #define MCF_GPIO_PAR_FECI2C_PAR_MDC(x) (((x)&0x03)<<6) argument
961 #define MCF_GPIO_PAR_SSI_PAR_TXD(x) (((x)&0x0003)<<8) argument
962 #define MCF_GPIO_PAR_SSI_PAR_RXD(x) (((x)&0x0003)<<10) argument
963 #define MCF_GPIO_PAR_SSI_PAR_FS(x) (((x)&0x0003)<<12) argument
964 #define MCF_GPIO_PAR_SSI_PAR_BCLK(x) (((x)&0x0003)<<14) argument
971 #define MCF_GPIO_PAR_UART_PAR_UTXD1(x) (((x)&0x0003)<<4) argument
972 #define MCF_GPIO_PAR_UART_PAR_URXD1(x) (((x)&0x0003)<<6) argument
973 #define MCF_GPIO_PAR_UART_PAR_URTS1(x) (((x)&0x0003)<<8) argument
974 #define MCF_GPIO_PAR_UART_PAR_UCTS1(x) (((x)&0x0003)<<10) argument
993 #define MCF_GPIO_PAR_QSPI_PAR_SCK(x) (((x)&0x0003)<<4) argument
994 #define MCF_GPIO_PAR_QSPI_PAR_DOUT(x) (((x)&0x0003)<<6) argument
995 #define MCF_GPIO_PAR_QSPI_PAR_DIN(x) (((x)&0x0003)<<8) argument
996 #define MCF_GPIO_PAR_QSPI_PAR_PCS0(x) (((x)&0x0003)<<10) argument
997 #define MCF_GPIO_PAR_QSPI_PAR_PCS1(x) (((x)&0x0003)<<12) argument
998 #define MCF_GPIO_PAR_QSPI_PAR_PCS2(x) (((x)&0x0003)<<14) argument
1001 #define MCF_GPIO_PAR_TIMER_PAR_TIN0(x) (((x)&0x03)<<0) argument
1002 #define MCF_GPIO_PAR_TIMER_PAR_TIN1(x) (((x)&0x03)<<2) argument
1003 #define MCF_GPIO_PAR_TIMER_PAR_TIN2(x) (((x)&0x03)<<4) argument
1004 #define MCF_GPIO_PAR_TIMER_PAR_TIN3(x) (((x)&0x03)<<6) argument
1023 #define MCF_GPIO_PAR_LCDDATA_PAR_LD7_0(x) (((x)&0x03)<<0) argument
1024 #define MCF_GPIO_PAR_LCDDATA_PAR_LD15_8(x) (((x)&0x03)<<2) argument
1025 #define MCF_GPIO_PAR_LCDDATA_PAR_LD16(x) (((x)&0x03)<<4) argument
1026 #define MCF_GPIO_PAR_LCDDATA_PAR_LD17(x) (((x)&0x03)<<6) argument
1040 #define MCF_GPIO_PAR_IRQ_PAR_IRQ1(x) (((x)&0x0003)<<4) argument
1041 #define MCF_GPIO_PAR_IRQ_PAR_IRQ2(x) (((x)&0x0003)<<6) argument
1042 #define MCF_GPIO_PAR_IRQ_PAR_IRQ4(x) (((x)&0x0003)<<8) argument
1043 #define MCF_GPIO_PAR_IRQ_PAR_IRQ5(x) (((x)&0x0003)<<10) argument
1044 #define MCF_GPIO_PAR_IRQ_PAR_IRQ6(x) (((x)&0x0003)<<12) argument
1047 #define MCF_GPIO_MSCR_FLEXBUS_MSCR_ADDRCTL(x) (((x)&0x03)<<0) argument
1048 #define MCF_GPIO_MSCR_FLEXBUS_MSCR_DLOWER(x) (((x)&0x03)<<2) argument
1049 #define MCF_GPIO_MSCR_FLEXBUS_MSCR_DUPPER(x) (((x)&0x03)<<4) argument
1052 #define MCF_GPIO_MSCR_SDRAM_MSCR_SDRAM(x) (((x)&0x03)<<0) argument
1053 #define MCF_GPIO_MSCR_SDRAM_MSCR_SDCLK(x) (((x)&0x03)<<2) argument
1054 #define MCF_GPIO_MSCR_SDRAM_MSCR_SDCLKB(x) (((x)&0x03)<<4) argument
1057 #define MCF_GPIO_DSCR_I2C_I2C_DSE(x) (((x)&0x03)<<0) argument
1060 #define MCF_GPIO_DSCR_PWM_PWM_DSE(x) (((x)&0x03)<<0) argument
1063 #define MCF_GPIO_DSCR_FEC_FEC_DSE(x) (((x)&0x03)<<0) argument
1066 #define MCF_GPIO_DSCR_UART_UART0_DSE(x) (((x)&0x03)<<0) argument
1067 #define MCF_GPIO_DSCR_UART_UART1_DSE(x) (((x)&0x03)<<2) argument
1070 #define MCF_GPIO_DSCR_QSPI_QSPI_DSE(x) (((x)&0x03)<<0) argument
1073 #define MCF_GPIO_DSCR_TIMER_TIMER_DSE(x) (((x)&0x03)<<0) argument
1076 #define MCF_GPIO_DSCR_SSI_SSI_DSE(x) (((x)&0x03)<<0) argument
1079 #define MCF_GPIO_DSCR_LCD_LCD_DSE(x) (((x)&0x03)<<0) argument
1082 #define MCF_GPIO_DSCR_DEBUG_DEBUG_DSE(x) (((x)&0x03)<<0) argument
1085 #define MCF_GPIO_DSCR_CLKRST_CLKRST_DSE(x) (((x)&0x03)<<0) argument
1088 #define MCF_GPIO_DSCR_IRQ_IRQ_DSE(x) (((x)&0x03)<<0) argument
1116 #define MCF_PLL_PODR_BUSDIV(x) (((x)&0x0F)<<0) argument
1117 #define MCF_PLL_PODR_CPUDIV(x) (((x)&0x0F)<<4) argument
1120 #define MCF_PLL_PLLCR_DITHDEV(x) (((x)&0x07)<<0) argument
1124 #define MCF_PLL_PMDR_MODDIV(x) (((x)&0xFF)<<0) argument
1127 #define MCF_PLL_PFDR_MFD(x) (((x)&0xFF)<<0) argument
1166 #define MCF_SDRAMC_SDMR_AD(x) (((x)&0x00000FFF)<<18) argument
1167 #define MCF_SDRAMC_SDMR_BNKAD(x) (((x)&0x00000003)<<30) argument
1174 #define MCF_SDRAMC_SDCR_DQS_OE(x) (((x)&0x0000000F)<<8) argument
1175 #define MCF_SDRAMC_SDCR_PS(x) (((x)&0x00000003)<<12) argument
1176 #define MCF_SDRAMC_SDCR_RCNT(x) (((x)&0x0000003F)<<16) argument
1178 #define MCF_SDRAMC_SDCR_MUX(x) (((x)&0x00000003)<<24) argument
1187 #define MCF_SDRAMC_SDCFG1_WTLAT(x) (((x)&0x00000007)<<4) argument
1188 #define MCF_SDRAMC_SDCFG1_REF2ACT(x) (((x)&0x0000000F)<<8) argument
1189 #define MCF_SDRAMC_SDCFG1_PRE2ACT(x) (((x)&0x00000007)<<12) argument
1190 #define MCF_SDRAMC_SDCFG1_ACT2RW(x) (((x)&0x00000007)<<16) argument
1191 #define MCF_SDRAMC_SDCFG1_RDLAT(x) (((x)&0x0000000F)<<20) argument
1192 #define MCF_SDRAMC_SDCFG1_SWT2RD(x) (((x)&0x00000007)<<24) argument
1193 #define MCF_SDRAMC_SDCFG1_SRD2RW(x) (((x)&0x0000000F)<<28) argument
1196 #define MCF_SDRAMC_SDCFG2_BL(x) (((x)&0x0000000F)<<16) argument
1197 #define MCF_SDRAMC_SDCFG2_BRD2WT(x) (((x)&0x0000000F)<<20) argument
1198 #define MCF_SDRAMC_SDCFG2_BWT2RW(x) (((x)&0x0000000F)<<24) argument
1199 #define MCF_SDRAMC_SDCFG2_BRD2PRE(x) (((x)&0x0000000F)<<28) argument
1205 #define MCF_SDRAMC_SDDS_SB_D(x) (((x)&0x00000003)<<0) argument
1206 #define MCF_SDRAMC_SDDS_SB_S(x) (((x)&0x00000003)<<2) argument
1207 #define MCF_SDRAMC_SDDS_SB_A(x) (((x)&0x00000003)<<4) argument
1208 #define MCF_SDRAMC_SDDS_SB_C(x) (((x)&0x00000003)<<6) argument
1209 #define MCF_SDRAMC_SDDS_SB_E(x) (((x)&0x00000003)<<8) argument
1212 #define MCF_SDRAMC_SDCS_CSSZ(x) (((x)&0x0000001F)<<0) argument
1213 #define MCF_SDRAMC_SDCS_BASE(x) (((x)&0x00000FFF)<<20) argument
1214 #define MCF_SDRAMC_SDCS_BA(x) ((x)&0xFFF00000) argument