Lines Matching refs:rtc
163 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; in bvme6000_timer_int() local
164 unsigned char msr = rtc->msr & 0xc0; in bvme6000_timer_int()
166 rtc->msr = msr | 0x20; /* Ack the interrupt */ in bvme6000_timer_int()
182 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; in bvme6000_sched_init() local
183 unsigned char msr = rtc->msr & 0xc0; in bvme6000_sched_init()
185 rtc->msr = 0; /* Ensure timer registers accessible */ in bvme6000_sched_init()
192 rtc->t1cr_omr = 0x04; /* Mode 2, ext clk */ in bvme6000_sched_init()
193 rtc->t1msb = 39999 >> 8; in bvme6000_sched_init()
194 rtc->t1lsb = 39999 & 0xff; in bvme6000_sched_init()
195 rtc->irr_icr1 &= 0xef; /* Route timer 1 to INTR pin */ in bvme6000_sched_init()
196 rtc->msr = 0x40; /* Access int.cntrl, etc */ in bvme6000_sched_init()
197 rtc->pfr_icr0 = 0x80; /* Just timer 1 ints enabled */ in bvme6000_sched_init()
198 rtc->irr_icr1 = 0; in bvme6000_sched_init()
199 rtc->t1cr_omr = 0x0a; /* INTR+T1 active lo, push-pull */ in bvme6000_sched_init()
200 rtc->t0cr_rtmr &= 0xdf; /* Stop timers in standby */ in bvme6000_sched_init()
201 rtc->msr = 0; /* Access timer 1 control */ in bvme6000_sched_init()
202 rtc->t1cr_omr = 0x05; /* Mode 2, ext clk, GO */ in bvme6000_sched_init()
204 rtc->msr = msr; in bvme6000_sched_init()
223 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; in bvme6000_gettimeoffset() local
225 unsigned char msr = rtc->msr & 0xc0; in bvme6000_gettimeoffset()
229 rtc->msr = 0; /* Ensure timer registers accessible */ in bvme6000_gettimeoffset()
233 t1int = rtc->msr & 0x20; in bvme6000_gettimeoffset()
235 rtc->t1cr_omr |= 0x40; /* Latch timer1 */ in bvme6000_gettimeoffset()
236 v = rtc->t1msb << 8; /* Read timer1 */ in bvme6000_gettimeoffset()
237 v |= rtc->t1lsb; /* Read timer1 */ in bvme6000_gettimeoffset()
238 } while (t1int != (rtc->msr & 0x20) || in bvme6000_gettimeoffset()
249 rtc->msr = msr; in bvme6000_gettimeoffset()
271 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; in bvme6000_hwclk() local
272 unsigned char msr = rtc->msr & 0xc0; in bvme6000_hwclk()
274 rtc->msr = 0x40; /* Ensure clock and real-time-mode-register in bvme6000_hwclk()
278 rtc->t0cr_rtmr = t->tm_year%4; in bvme6000_hwclk()
279 rtc->bcd_tenms = 0; in bvme6000_hwclk()
280 rtc->bcd_sec = bin2bcd(t->tm_sec); in bvme6000_hwclk()
281 rtc->bcd_min = bin2bcd(t->tm_min); in bvme6000_hwclk()
282 rtc->bcd_hr = bin2bcd(t->tm_hour); in bvme6000_hwclk()
283 rtc->bcd_dom = bin2bcd(t->tm_mday); in bvme6000_hwclk()
284 rtc->bcd_mth = bin2bcd(t->tm_mon + 1); in bvme6000_hwclk()
285 rtc->bcd_year = bin2bcd(t->tm_year%100); in bvme6000_hwclk()
287 rtc->bcd_dow = bin2bcd(t->tm_wday+1); in bvme6000_hwclk()
288 rtc->t0cr_rtmr = t->tm_year%4 | 0x08; in bvme6000_hwclk()
293 t->tm_sec = bcd2bin(rtc->bcd_sec); in bvme6000_hwclk()
294 t->tm_min = bcd2bin(rtc->bcd_min); in bvme6000_hwclk()
295 t->tm_hour = bcd2bin(rtc->bcd_hr); in bvme6000_hwclk()
296 t->tm_mday = bcd2bin(rtc->bcd_dom); in bvme6000_hwclk()
297 t->tm_mon = bcd2bin(rtc->bcd_mth)-1; in bvme6000_hwclk()
298 t->tm_year = bcd2bin(rtc->bcd_year); in bvme6000_hwclk()
301 t->tm_wday = bcd2bin(rtc->bcd_dow)-1; in bvme6000_hwclk()
302 } while (t->tm_sec != bcd2bin(rtc->bcd_sec)); in bvme6000_hwclk()
305 rtc->msr = msr; in bvme6000_hwclk()
322 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; in bvme6000_set_clock_mmss() local
323 unsigned char msr = rtc->msr & 0xc0; in bvme6000_set_clock_mmss()
327 rtc->msr = 0; /* Ensure clock accessible */ in bvme6000_set_clock_mmss()
328 rtc_minutes = bcd2bin (rtc->bcd_min); in bvme6000_set_clock_mmss()
335 rtc_tenms = rtc->bcd_tenms; in bvme6000_set_clock_mmss()
336 while (rtc_tenms == rtc->bcd_tenms) in bvme6000_set_clock_mmss()
340 rtc->bcd_min = bin2bcd(real_minutes); in bvme6000_set_clock_mmss()
341 rtc->bcd_sec = bin2bcd(real_seconds); in bvme6000_set_clock_mmss()
347 rtc->msr = msr; in bvme6000_set_clock_mmss()