Lines Matching refs:isr
237 fp_emulate (int fp_fault, void *bundle, long *ipsr, long *fpsr, long *isr, long *pr, long *ifs, in fp_emulate() argument
269 (unsigned long *) isr, (unsigned long *) pr, in fp_emulate()
288 handle_fpu_swa (int fp_fault, struct pt_regs *regs, unsigned long isr) in handle_fpu_swa() argument
328 current->comm, task_pid_nr(current), regs->cr_iip + ia64_psr(regs)->ri, isr); in handle_fpu_swa()
333 exception = fp_emulate(fp_fault, bundle, ®s->cr_ipsr, ®s->ar_fpsr, &isr, ®s->pr, in handle_fpu_swa()
351 if (isr & 0x11) { in handle_fpu_swa()
353 } else if (isr & 0x22) { in handle_fpu_swa()
357 } else if (isr & 0x44) { in handle_fpu_swa()
360 siginfo.si_isr = isr; in handle_fpu_swa()
375 if (isr & 0x880) { in handle_fpu_swa()
377 } else if (isr & 0x1100) { in handle_fpu_swa()
379 } else if (isr & 0x2200) { in handle_fpu_swa()
382 siginfo.si_isr = isr; in handle_fpu_swa()
428 ia64_fault (unsigned long vector, unsigned long isr, unsigned long ifa, in ia64_fault() argument
432 unsigned long code, error = isr, iip; in ia64_fault()
447 if ((isr & IA64_ISR_NA) && ((isr & IA64_ISR_CODE_MASK) == IA64_ISR_CODE_LFETCH)) { in ia64_fault()
460 code = (isr >> 4) & 0xf; in ia64_fault()
462 (code == 3) ? ((isr & (1UL << 37)) in ia64_fault()
475 if (isr & 2) { in ia64_fault()
486 if (((isr >> 4) & 0xf) == 2) { in ia64_fault()
504 siginfo.si_isr = isr; in ia64_fault()
520 siginfo.si_isr = isr; in ia64_fault()
573 siginfo.si_isr = isr; in ia64_fault()
579 result = handle_fpu_swa((vector == 32) ? 1 : 0, ®s, isr); in ia64_fault()
586 siginfo.si_isr = isr; in ia64_fault()
593 if (isr & 0x2) { in ia64_fault()
631 iip, ifa, isr); in ia64_fault()
638 iip, ifa, isr, iim); in ia64_fault()
643 sprintf(buf, "IA-32 Interruption Fault (int 0x%lx)", isr >> 16); in ia64_fault()