Lines Matching refs:ar
50 mov ar.lc=IA64_NUM_DBG_REGS-1;; \
58 mov ar.lc=IA64_NUM_DBG_REGS-1;; \
89 mov ar.lc=0x08-1;; \
117 SAVE_FROM_REG(ar.fpsr,_reg1,_reg2);; \
118 SAVE_FROM_REG(ar.pfs,_reg1,_reg2);; \
119 SAVE_FROM_REG(ar.rnat,_reg1,_reg2);; \
120 SAVE_FROM_REG(ar.unat,_reg1,_reg2);; \
121 SAVE_FROM_REG(ar.bspstore,_reg1,_reg2);; \
135 SAVE_FROM_REG(ar.lc, _reg1, _reg2);; \
289 mov ar.fpsr=r2
358 mov ar.rsc=0 // place RSE in enforced lazy mode
388 mov ar.bspstore=r2 // establish the new RSE stack
390 mov ar.rsc=0x3 // place RSE in eager mode
448 alloc r2=ar.pfs,8,0,2,0
460 alloc r16=ar.pfs,1,0,0,0
461 mov r20=ar.lc // preserve ar.lc
462 mov ar.lc=IA64_NUM_DBG_REGS-1
478 mov ar.lc=r20 // restore ar.lc
483 alloc r16=ar.pfs,1,0,0,0
485 mov r20=ar.lc // preserve ar.lc
487 mov ar.lc=IA64_NUM_DBG_REGS-1
502 mov ar.lc=r20 // restore ar.lc
507 alloc r2=ar.pfs,1,4,0,0
672 alloc r2=ar.pfs,1,2,0,0
937 mov r19=ar.bsp
949 mov r18=ar.rnat // save ar.rnat
950 mov ar.bspstore=r17 // this steps on ar.rnat
954 mov ar.rnat=r18 // restore ar.rnat
1000 mov r18=ar.rnat // save ar.rnat
1001 mov ar.bspstore=r19 // this steps on ar.rnat
1005 mov ar.rnat=r18 // restore ar.rnat
1015 .save ar.lc,r2
1016 mov r2=ar.lc
1019 mov ar.lc=r32
1027 mov ar.lc=r2
1051 mov.m r9=ar.itc // fetch cycle-counter (35 cyc)
1075 alloc r16=ar.pfs,1,0,0,0
1101 alloc r16=ar.pfs,1,0,0,0; \
1119 alloc r16=ar.pfs,1,0,0,0;;
1132 mov ar.rsc=0 // Put RSE in enforced lazy, LE mode
1157 RESTORE_REG(ar.fpsr, r25, r17);;
1158 RESTORE_REG(ar.pfs, r25, r17);;
1159 RESTORE_REG(ar.rnat, r25, r17);;
1160 RESTORE_REG(ar.unat, r25, r17);;
1161 RESTORE_REG(ar.bspstore, r25, r17);;
1177 RESTORE_REG(ar.lc, r25, r17);;