Lines Matching refs:ar
104 .savesp ar.unat, UNAT_OFF+SIGCONTEXT_OFF; \
105 .savesp ar.fpsr, FPSR_OFF+SIGCONTEXT_OFF; \
108 .savesp ar.pfs, CFM_OFF+SIGCONTEXT_OFF; \
128 mov.m r9=ar.bsp // fetch ar.bsp
129 .spillsp.p p1, ar.rnat, RNAT_OFF+SIGCONTEXT_OFF
132 alloc r8=ar.pfs,0,0,3,0
143 .spillsp ar.bsp, BSP_OFF+SIGCONTEXT_OFF
167 mov r14=ar.bsp
197 mov ar.rsc=0 // put RSE into enforced lazy mode
199 .save ar.rnat, r19
200 mov r19=ar.rnat // save RNaT before switching backing store area
203 mov r18=ar.bspstore
204 mov ar.bspstore=r15 // switch over to new register backing store area
207 .spillsp ar.rnat, RNAT_OFF+SIGCONTEXT_OFF
210 mov.m r16=ar.bsp // sc_loadrs <- (new bsp - new bspstore) << 16
217 mov ar.rsc=0xf // set RSE into eager mode, pl 3
228 .spillsp ar.rnat, RNAT_OFF+SIGCONTEXT_OFF
244 alloc r2=ar.pfs,0,0,0,0 // alloc null frame
252 mov ar.rsc=r17 // put RSE into enforced lazy mode
291 mov ar.bspstore=r15 // switch back to old register backing store area
293 mov ar.rnat=r16 // restore RNaT
294 mov ar.rsc=0xf // (will be restored later on from sc_ar_rsc)
340 mov r21=ar.fpsr // M2 (12 cyc)
342 mov.i r26=ar.pfs // I0 (would stall anyhow due to srlz.d...)
356 mov r27=ar.rsc // M2 (12 cyc)