Lines Matching refs:r14
253 adds r14=SW(R4)+16,sp
255 st8.spill [r14]=r4,16 // spill r4
267 add r14=SW(R4)+16,sp
269 st8.spill [r14]=r4,SW(R6)-SW(R4) // spill r4 and prefetch offset 0x1c0
284 st8.spill [r14]=r6,SW(B0)-SW(R6) // spill r6
304 st8 [r14]=r21,SW(B1)-SW(B0) // save b0
309 st8 [r14]=r22,SW(B4)-SW(B1) // save b1
315 st8 [r14]=r25,SW(B5)-SW(B4) // save b4
320 st8 [r14]=r26 // save b5
345 add r14=SW(CALLER_UNAT)+16,sp
348 st8 [r14]=r17,SW(AR_FPSR)-SW(CALLER_UNAT) // save caller_unat
355 st8 [r14]=r18 // save fpsr
375 adds r14=SW(CALLER_UNAT)+16,sp
396 ld8 r18=[r14],16 // restore caller's unat
399 ldf.fill f2=[r14],32
402 ldf.fill f4=[r14],32
405 ldf.fill f12=[r14],32
408 ldf.fill f14=[r14],32
411 ldf.fill f16=[r14],32
414 ldf.fill f18=[r14],32
418 ldf.fill f20=[r14],32
422 ldf.fill f22=[r14],32
430 ldf.fill f24=[r14],32
434 ldf.fill f26=[r14],32
438 ldf.fill f28=[r14],32
442 ldf.fill f30=[r14],32
446 ld8.fill r4=[r14],16
450 ld8.fill r6=[r14],16
461 add r14 = -IA64_SWITCH_STACK_SIZE, sp
465 lfetch.fault.excl [r14], 128
467 lfetch.fault.excl [r14], 128
470 lfetch.fault.excl [r14], 128
473 lfetch.fault.excl [r14], 128
476 lfetch.fault.excl [r14], 128
593 ld8 r14 = [r4], 8 // fn.address
595 mov b6 = r14
766 (pUStk) add r14=TI_AC_LEAVE+IA64_TASK_SIZE,r13
777 (pUStk) add r14=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
799 (pUStk) st1 [r14]=r17 // M2|3
818 st8 [r14]=r22 // M save time at leave
822 movl r14=__kernel_syscall_via_epc // X
829 movl r14=__kernel_syscall_via_epc // X
834 mov b7=r14 // I0 clear b7 (hint with __kernel_syscall_via_epc)
996 ld8.fill r14=[r16],16