313 	reg_sser_rw_cfg cfg = REG_RD(sser, port->regi_sser, rw_cfg);  in sync_serial_start_port()
315 		REG_RD(sser, port->regi_sser, rw_tr_cfg);  in sync_serial_start_port()
317 		REG_RD(sser, port->regi_sser, rw_rec_cfg);  in sync_serial_start_port()
321 	REG_WR(sser, port->regi_sser, rw_cfg, cfg);  in sync_serial_start_port()
322 	REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);  in sync_serial_start_port()
323 	REG_WR(sser, port->regi_sser, rw_rec_cfg, rec_cfg);  in sync_serial_start_port()
367 	REG_WR(sser, port->regi_sser, rw_cfg, cfg);  in initialize_port()
377 	REG_WR(sser, port->regi_sser, rw_frm_cfg, frm_cfg);  in initialize_port()
391 	REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);  in initialize_port()
397 	REG_WR(sser, port->regi_sser, rw_rec_cfg, rec_cfg);  in initialize_port()
760 	tr_cfg = REG_RD(sser, port->regi_sser, rw_tr_cfg);  in sync_serial_ioctl_unlocked()
761 	rec_cfg = REG_RD(sser, port->regi_sser, rw_rec_cfg);  in sync_serial_ioctl_unlocked()
762 	frm_cfg = REG_RD(sser, port->regi_sser, rw_frm_cfg);  in sync_serial_ioctl_unlocked()
763 	gen_cfg = REG_RD(sser, port->regi_sser, rw_cfg);  in sync_serial_ioctl_unlocked()
764 	intr_mask = REG_RD(sser, port->regi_sser, rw_intr_mask);  in sync_serial_ioctl_unlocked()
1034 	REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);  in sync_serial_ioctl_unlocked()
1035 	REG_WR(sser, port->regi_sser, rw_rec_cfg, rec_cfg);  in sync_serial_ioctl_unlocked()
1036 	REG_WR(sser, port->regi_sser, rw_frm_cfg, frm_cfg);  in sync_serial_ioctl_unlocked()
1037 	REG_WR(sser, port->regi_sser, rw_intr_mask, intr_mask);  in sync_serial_ioctl_unlocked()
1038 	REG_WR(sser, port->regi_sser, rw_cfg, gen_cfg);  in sync_serial_ioctl_unlocked()
1045 		REG_WR(sser, port->regi_sser, rw_cfg, gen_cfg);  in sync_serial_ioctl_unlocked()
1050 		REG_WR(sser, port->regi_sser, rw_cfg, gen_cfg);  in sync_serial_ioctl_unlocked()
1143 		reg_sser_rw_cfg cfg = REG_RD(sser, port->regi_sser, rw_cfg);  in sync_serial_write()
1145 			REG_RD(sser, port->regi_sser, rw_rec_cfg);  in sync_serial_write()
1148 		REG_WR(sser, port->regi_sser, rw_cfg, cfg);  in sync_serial_write()
1149 		REG_WR(sser, port->regi_sser, rw_rec_cfg, rec_cfg);  in sync_serial_write()
1168 		intr_mask = REG_RD(sser, port->regi_sser, rw_intr_mask);  in sync_serial_write()
1173 		REG_WR(sser, port->regi_sser, rw_intr_mask, intr_mask);  in sync_serial_write()
1205 	reg_sser_rw_tr_cfg tr_cfg = REG_RD(sser, port->regi_sser, rw_tr_cfg);  in send_word()
1212 		REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);  in send_word()
1222 		REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);  in send_word()
1230 		REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);  in send_word()
1238 		REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);  in send_word()
1241 		REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);  in send_word()
1248 		REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);  in send_word()
1251 		REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);  in send_word()
1276 		reg_sser_rw_tr_cfg tr_cfg = REG_RD(sser, port->regi_sser,  in start_dma_out()
1288 		REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);  in start_dma_out()
1421 			tr_cfg = REG_RD(sser, port->regi_sser, rw_tr_cfg);  in tr_interrupt()
1431 			REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);  in tr_interrupt()
1531 		masked = REG_RD(sser, port->regi_sser, r_masked_intr);  in manual_interrupt()
1535 				REG_RD(sser, port->regi_sser, rw_rec_cfg);  in manual_interrupt()
1536 			reg_sser_r_rec_data data = REG_RD(sser,  in manual_interrupt()
1590 				intr_mask = REG_RD(sser, port->regi_sser,  in manual_interrupt()
1593 				REG_WR(sser, port->regi_sser,  in manual_interrupt()