Lines Matching refs:IO_STATE
17 #define START_ETHERNET_CLOCK IO_STATE(R_NETWORK_GEN_CONFIG, enable, on) |\
18 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk)
383 move.d IO_STATE (R_EXT_DMA_0_CMD, cnt, enable) \
384 | IO_STATE (R_EXT_DMA_0_CMD, rqpol, ahigh) \
385 | IO_STATE (R_EXT_DMA_0_CMD, apol, ahigh) \
386 | IO_STATE (R_EXT_DMA_0_CMD, rq_ack, burst) \
387 | IO_STATE (R_EXT_DMA_0_CMD, wid, word) \
388 | IO_STATE (R_EXT_DMA_0_CMD, dir, output) \
389 | IO_STATE (R_EXT_DMA_0_CMD, run, stop) \
395 moveq IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
399 cmp.b IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
405 moveq IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
409 cmp.b IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
420 or.d IO_STATE (R_GEN_CONFIG, ser2, select),$r0
422 or.d IO_STATE (R_GEN_CONFIG, ser2, disable),$r0
426 or.d IO_STATE (R_GEN_CONFIG, scsi0, disable) \
427 | IO_STATE (R_GEN_CONFIG, ata, disable) \
428 | IO_STATE (R_GEN_CONFIG, par0, disable) \
429 | IO_STATE (R_GEN_CONFIG, mio, disable) \
430 | IO_STATE (R_GEN_CONFIG, scsi1, disable) \
431 | IO_STATE (R_GEN_CONFIG, scsi0w, disable) \
432 | IO_STATE (R_GEN_CONFIG, par1, disable) \
433 | IO_STATE (R_GEN_CONFIG, ser3, disable) \
434 | IO_STATE (R_GEN_CONFIG, mio_w, disable) \
435 | IO_STATE (R_GEN_CONFIG, usb1, disable) \
436 | IO_STATE (R_GEN_CONFIG, usb2, disable) \
437 | IO_STATE (R_GEN_CONFIG, par_w, disable),$r0
440 or.d IO_STATE (R_GEN_CONFIG, dma2, ata) \
441 | IO_STATE (R_GEN_CONFIG, dma3, ata) \
442 | IO_STATE (R_GEN_CONFIG, dma4, scsi1) \
443 | IO_STATE (R_GEN_CONFIG, dma5, scsi1) \
444 | IO_STATE (R_GEN_CONFIG, dma6, unused) \
445 | IO_STATE (R_GEN_CONFIG, dma7, unused) \
446 | IO_STATE (R_GEN_CONFIG, dma8, usb) \
447 | IO_STATE (R_GEN_CONFIG, dma9, usb),$r0
451 or.d IO_STATE (R_GEN_CONFIG, g0dir, out),$r0
455 or.d IO_STATE (R_GEN_CONFIG, g8_15dir, out),$r0
458 or.d IO_STATE (R_GEN_CONFIG, g16_23dir, out),$r0
462 or.d IO_STATE (R_GEN_CONFIG, g24dir, out),$r0
485 moveq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
490 cmpq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
495 cmpq IO_STATE (R_DMA_CH9_CMD, cmd, reset),$r0
504 or.b IO_STATE (R_PORT_PA_DIR, dir7, output),$r0
524 or.b IO_STATE (R_PORT_PB_DIR, dir5, output),$r0
563 moveq IO_STATE (R_SERIAL0_XOFF, tx_stop, enable) \
564 | IO_STATE (R_SERIAL0_XOFF, auto_xoff, disable) \
569 move.b IO_STATE (R_SERIAL0_BAUD, tr_baud, c115k2Hz) \
570 | IO_STATE (R_SERIAL0_BAUD, rec_baud, c115k2Hz),$r0
574 move.b IO_STATE (R_SERIAL0_REC_CTRL, dma_err, stop) \
575 | IO_STATE (R_SERIAL0_REC_CTRL, rec_enable, enable) \
576 | IO_STATE (R_SERIAL0_REC_CTRL, rts_, active) \
577 | IO_STATE (R_SERIAL0_REC_CTRL, sampling, middle) \
578 | IO_STATE (R_SERIAL0_REC_CTRL, rec_stick_par, normal) \
579 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par, even) \
580 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par_en, disable) \
581 | IO_STATE (R_SERIAL0_REC_CTRL, rec_bitnr, rec_8bit),$r0
586 | IO_STATE (R_SERIAL0_TR_CTRL, tr_enable, enable) \
587 | IO_STATE (R_SERIAL0_TR_CTRL, auto_cts, disabled) \
588 | IO_STATE (R_SERIAL0_TR_CTRL, stop_bits, one_bit) \
589 | IO_STATE (R_SERIAL0_TR_CTRL, tr_stick_par, normal) \
590 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par, even) \
591 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par_en, disable) \
592 | IO_STATE (R_SERIAL0_TR_CTRL, tr_bitnr, tr_8bit),$r0
597 moveq IO_STATE (R_SERIAL1_XOFF, tx_stop, enable) \
598 | IO_STATE (R_SERIAL1_XOFF, auto_xoff, disable) \
603 move.b IO_STATE (R_SERIAL1_BAUD, tr_baud, c115k2Hz) \
604 | IO_STATE (R_SERIAL1_BAUD, rec_baud, c115k2Hz),$r0
608 move.b IO_STATE (R_SERIAL1_REC_CTRL, dma_err, stop) \
609 | IO_STATE (R_SERIAL1_REC_CTRL, rec_enable, enable) \
610 | IO_STATE (R_SERIAL1_REC_CTRL, rts_, active) \
611 | IO_STATE (R_SERIAL1_REC_CTRL, sampling, middle) \
612 | IO_STATE (R_SERIAL1_REC_CTRL, rec_stick_par, normal) \
613 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par, even) \
614 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par_en, disable) \
615 | IO_STATE (R_SERIAL1_REC_CTRL, rec_bitnr, rec_8bit),$r0
620 | IO_STATE (R_SERIAL1_TR_CTRL, tr_enable, enable) \
621 | IO_STATE (R_SERIAL1_TR_CTRL, auto_cts, disabled) \
622 | IO_STATE (R_SERIAL1_TR_CTRL, stop_bits, one_bit) \
623 | IO_STATE (R_SERIAL1_TR_CTRL, tr_stick_par, normal) \
624 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par, even) \
625 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par_en, disable) \
626 | IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0
632 moveq IO_STATE (R_SERIAL2_XOFF, tx_stop, enable) \
633 | IO_STATE (R_SERIAL2_XOFF, auto_xoff, disable) \
638 move.b IO_STATE (R_SERIAL2_BAUD, tr_baud, c115k2Hz) \
639 | IO_STATE (R_SERIAL2_BAUD, rec_baud, c115k2Hz),$r0
643 move.b IO_STATE (R_SERIAL2_REC_CTRL, dma_err, stop) \
644 | IO_STATE (R_SERIAL2_REC_CTRL, rec_enable, enable) \
645 | IO_STATE (R_SERIAL2_REC_CTRL, rts_, active) \
646 | IO_STATE (R_SERIAL2_REC_CTRL, sampling, middle) \
647 | IO_STATE (R_SERIAL2_REC_CTRL, rec_stick_par, normal) \
648 | IO_STATE (R_SERIAL2_REC_CTRL, rec_par, even) \
649 | IO_STATE (R_SERIAL2_REC_CTRL, rec_par_en, disable) \
650 | IO_STATE (R_SERIAL2_REC_CTRL, rec_bitnr, rec_8bit),$r0
655 | IO_STATE (R_SERIAL2_TR_CTRL, tr_enable, enable) \
656 | IO_STATE (R_SERIAL2_TR_CTRL, auto_cts, disabled) \
657 | IO_STATE (R_SERIAL2_TR_CTRL, stop_bits, one_bit) \
658 | IO_STATE (R_SERIAL2_TR_CTRL, tr_stick_par, normal) \
659 | IO_STATE (R_SERIAL2_TR_CTRL, tr_par, even) \
660 | IO_STATE (R_SERIAL2_TR_CTRL, tr_par_en, disable) \
661 | IO_STATE (R_SERIAL2_TR_CTRL, tr_bitnr, tr_8bit),$r0
668 moveq IO_STATE (R_SERIAL3_XOFF, tx_stop, enable) \
669 | IO_STATE (R_SERIAL3_XOFF, auto_xoff, disable) \
674 move.b IO_STATE (R_SERIAL3_BAUD, tr_baud, c115k2Hz) \
675 | IO_STATE (R_SERIAL3_BAUD, rec_baud, c115k2Hz),$r0
679 move.b IO_STATE (R_SERIAL3_REC_CTRL, dma_err, stop) \
680 | IO_STATE (R_SERIAL3_REC_CTRL, rec_enable, enable) \
681 | IO_STATE (R_SERIAL3_REC_CTRL, rts_, active) \
682 | IO_STATE (R_SERIAL3_REC_CTRL, sampling, middle) \
683 | IO_STATE (R_SERIAL3_REC_CTRL, rec_stick_par, normal) \
684 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par, even) \
685 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par_en, disable) \
686 | IO_STATE (R_SERIAL3_REC_CTRL, rec_bitnr, rec_8bit),$r0
691 | IO_STATE (R_SERIAL3_TR_CTRL, tr_enable, enable) \
692 | IO_STATE (R_SERIAL3_TR_CTRL, auto_cts, disabled) \
693 | IO_STATE (R_SERIAL3_TR_CTRL, stop_bits, one_bit) \
694 | IO_STATE (R_SERIAL3_TR_CTRL, tr_stick_par, normal) \
695 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par, even) \
696 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par_en, disable) \
697 | IO_STATE (R_SERIAL3_TR_CTRL, tr_bitnr, tr_8bit),$r0