Lines Matching refs:BIT
58 #define PLLPREDIV_EN BIT(15)
62 #define PLLCTL_PLLEN BIT(0)
63 #define PLLCTL_PLLPWRDN BIT(1)
64 #define PLLCTL_PLLRST BIT(3)
65 #define PLLCTL_PLLDIS BIT(4)
66 #define PLLCTL_PLLENSRC BIT(5)
67 #define PLLCTL_CLKMODE BIT(8)
70 #define PLLCMD_GOSTAT BIT(0)
73 #define PLLSTAT_GOSTAT BIT(0)
76 #define PLLDIV_EN BIT(15)
100 #define ALWAYS_ENABLED BIT(1)
101 #define CLK_PLL BIT(2) /* PLL-derived clock */
102 #define PRE_PLL BIT(3) /* source is before PLL mult/div */
103 #define FIXED_DIV_PLL BIT(4) /* fixed divisor from PLL */
104 #define FIXED_RATE_PLL BIT(5) /* fixed ouput rate PLL */
120 #define PLL_HAS_PRE BIT(0)
121 #define PLL_HAS_MUL BIT(1)
122 #define PLL_HAS_POST BIT(2)