Lines Matching refs:msel
141 u32 msel; in pll_get_rate() local
146 msel = (ctl & CGU0_CTL_MSEL_MASK) >> CGU0_CTL_MSEL_SHIFT; in pll_get_rate()
149 return clk->parent->rate / (df + 1) * msel * 2; in pll_get_rate()
161 u32 msel; in pll_set_rate() local
169 msel = rate / clk->parent->rate / 2; in pll_set_rate()
170 clk_reg_write_mask(CGU0_CTL, msel << CGU0_CTL_MSEL_SHIFT, in pll_set_rate()
187 u32 msel; in sys_clk_get_rate() local
192 msel = (ctl & CGU0_CTL_MSEL_MASK) >> CGU0_CTL_MSEL_SHIFT; in sys_clk_get_rate()
197 drate *= msel; in sys_clk_get_rate()
217 u32 msel; in sys_clk_round_rate() local
221 msel = (ctl & CGU0_CTL_MSEL_MASK) >> CGU0_CTL_MSEL_SHIFT; in sys_clk_round_rate()
223 max_rate = clk->parent->rate / (df + 1) * msel; in sys_clk_round_rate()