52 #define eic_writel(port,reg,value)			\  macro
67 	eic_writel(eic, ICR, 1 << (d->irq - eic->first_irq));  in eic_ack_irq()
73 	eic_writel(eic, IDR, 1 << (d->irq - eic->first_irq));  in eic_mask_irq()
79 	eic_writel(eic, ICR, 1 << (d->irq - eic->first_irq));  in eic_mask_ack_irq()
80 	eic_writel(eic, IDR, 1 << (d->irq - eic->first_irq));  in eic_mask_ack_irq()
86 	eic_writel(eic, IER, 1 << (d->irq - eic->first_irq));  in eic_unmask_irq()
125 	eic_writel(eic, MODE, mode);  in eic_set_irq_type()
126 	eic_writel(eic, EDGE, edge);  in eic_set_irq_type()
127 	eic_writel(eic, LEVEL, level);  in eic_set_irq_type()
169 		eic_writel(nmi_eic, NMIC, EIC_NMIC_ENABLE);  in nmi_enable()
177 		eic_writel(nmi_eic, NMIC, 0);  in nmi_disable()
217 	eic_writel(eic, IDR, ~0UL);  in eic_probe()
218 	eic_writel(eic, MODE, ~0UL);  in eic_probe()
223 	eic_writel(eic, EDGE, 0UL);  in eic_probe()
224 	eic_writel(eic, LEVEL, 0UL);  in eic_probe()