Lines Matching refs:control

115 static unsigned long pll_get_rate(struct clk *clk, unsigned long control)  in pll_get_rate()  argument
119 div = PM_BFEXT(PLLDIV, control) + 1; in pll_get_rate()
120 mul = PM_BFEXT(PLLMUL, control) + 1; in pll_get_rate()
196 u32 control; in pll0_get_rate() local
198 control = pm_readl(PLL0); in pll0_get_rate()
200 return pll_get_rate(clk, control); in pll0_get_rate()
240 u32 control; in pll1_get_rate() local
242 control = pm_readl(PLL1); in pll1_get_rate()
244 return pll_get_rate(clk, control); in pll1_get_rate()
371 u32 control; in cpu_clk_set_rate() local
375 control = pm_readl(CKSEL); in cpu_clk_set_rate()
377 if (control & PM_BIT(HSBDIV)) in cpu_clk_set_rate()
378 child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1); in cpu_clk_set_rate()
384 control &= ~PM_BIT(CPUDIV); in cpu_clk_set_rate()
391 control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control); in cpu_clk_set_rate()
399 pm_writel(CKSEL, control); in cpu_clk_set_rate()
515 u32 control; in genclk_mode() local
517 control = pm_readl(GCCTRL(clk->index)); in genclk_mode()
519 control |= PM_BIT(CEN); in genclk_mode()
521 control &= ~PM_BIT(CEN); in genclk_mode()
522 pm_writel(GCCTRL(clk->index), control); in genclk_mode()
527 u32 control; in genclk_get_rate() local
530 control = pm_readl(GCCTRL(clk->index)); in genclk_get_rate()
531 if (control & PM_BIT(DIVEN)) in genclk_get_rate()
532 div = 2 * (PM_BFEXT(DIV, control) + 1); in genclk_get_rate()
539 u32 control; in genclk_set_rate() local
543 control = pm_readl(GCCTRL(clk->index)); in genclk_set_rate()
547 control &= ~PM_BIT(DIVEN); in genclk_set_rate()
550 control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN); in genclk_set_rate()
558 pm_writel(GCCTRL(clk->index), control); in genclk_set_rate()
565 u32 control; in genclk_set_parent() local
570 control = pm_readl(GCCTRL(clk->index)); in genclk_set_parent()
573 control |= PM_BIT(OSCSEL); in genclk_set_parent()
575 control &= ~PM_BIT(OSCSEL); in genclk_set_parent()
580 control |= PM_BIT(PLLSEL); in genclk_set_parent()
582 control &= ~PM_BIT(PLLSEL); in genclk_set_parent()
584 pm_writel(GCCTRL(clk->index), control); in genclk_set_parent()
592 u32 control; in genclk_init_parent() local
597 control = pm_readl(GCCTRL(clk->index)); in genclk_init_parent()
598 if (control & PM_BIT(OSCSEL)) in genclk_init_parent()
599 parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1; in genclk_init_parent()
601 parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0; in genclk_init_parent()