96 static struct clk devname##_##_name = {				\
107 static struct clk osc0;
108 static struct clk osc1;
110 static unsigned long osc_get_rate(struct clk *clk)  in osc_get_rate()  argument
112 	return at32_board_osc_rates[clk->index];  in osc_get_rate()
115 static unsigned long pll_get_rate(struct clk *clk, unsigned long control)  in pll_get_rate()  argument
122 	rate = clk->parent->get_rate(clk->parent);  in pll_get_rate()
129 static long pll_set_rate(struct clk *clk, unsigned long rate,  in pll_set_rate()  argument
150 	base = clk->parent->get_rate(clk->parent);  in pll_set_rate()
186 	if (clk->parent == &osc1)  in pll_set_rate()
194 static unsigned long pll0_get_rate(struct clk *clk)  in pll0_get_rate()  argument
200 	return pll_get_rate(clk, control);  in pll0_get_rate()
203 static void pll1_mode(struct clk *clk, int enabled)  in pll1_mode()  argument
214 					clk->name);  in pll1_mode()
231 					clk->name);  in pll1_mode()
238 static unsigned long pll1_get_rate(struct clk *clk)  in pll1_get_rate()  argument
244 	return pll_get_rate(clk, control);  in pll1_get_rate()
247 static long pll1_set_rate(struct clk *clk, unsigned long rate, int apply)  in pll1_set_rate()  argument
252 	actual_rate = pll_set_rate(clk, rate, &ctrl);  in pll1_set_rate()
257 		if (clk->users > 0)  in pll1_set_rate()
260 				clk->name, rate, actual_rate);  in pll1_set_rate()
267 static int pll1_set_parent(struct clk *clk, struct clk *parent)  in pll1_set_parent()  argument
271 	if (clk->users > 0)  in pll1_set_parent()
285 	clk->parent = parent;  in pll1_set_parent()
294 static struct clk osc32k = {
300 static struct clk osc0 = {
306 static struct clk osc1 = {
311 static struct clk pll0 = {
316 static struct clk pll1 = {
330 static struct clk *main_clock;
338 static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)  in bus_clk_get_rate()  argument
343 static void cpu_clk_mode(struct clk *clk, int enabled)  in cpu_clk_mode()  argument
351 		mask |= 1 << clk->index;  in cpu_clk_mode()
353 		mask &= ~(1 << clk->index);  in cpu_clk_mode()
358 static unsigned long cpu_clk_get_rate(struct clk *clk)  in cpu_clk_get_rate()  argument
366 	return bus_clk_get_rate(clk, shift);  in cpu_clk_get_rate()
369 static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)  in cpu_clk_set_rate()  argument
374 	parent_rate = clk->parent->get_rate(clk->parent);  in cpu_clk_set_rate()
396 			clk->name, rate, actual_rate);  in cpu_clk_set_rate()
404 static void hsb_clk_mode(struct clk *clk, int enabled)  in hsb_clk_mode()  argument
412 		mask |= 1 << clk->index;  in hsb_clk_mode()
414 		mask &= ~(1 << clk->index);  in hsb_clk_mode()
419 static unsigned long hsb_clk_get_rate(struct clk *clk)  in hsb_clk_get_rate()  argument
427 	return bus_clk_get_rate(clk, shift);  in hsb_clk_get_rate()
430 void pba_clk_mode(struct clk *clk, int enabled)  in pba_clk_mode()  argument
438 		mask |= 1 << clk->index;  in pba_clk_mode()
440 		mask &= ~(1 << clk->index);  in pba_clk_mode()
445 unsigned long pba_clk_get_rate(struct clk *clk)  in pba_clk_get_rate()  argument
453 	return bus_clk_get_rate(clk, shift);  in pba_clk_get_rate()
456 static void pbb_clk_mode(struct clk *clk, int enabled)  in pbb_clk_mode()  argument
464 		mask |= 1 << clk->index;  in pbb_clk_mode()
466 		mask &= ~(1 << clk->index);  in pbb_clk_mode()
471 static unsigned long pbb_clk_get_rate(struct clk *clk)  in pbb_clk_get_rate()  argument
479 	return bus_clk_get_rate(clk, shift);  in pbb_clk_get_rate()
482 static struct clk cpu_clk = {
488 static struct clk hsb_clk = {
493 static struct clk pba_clk = {
500 static struct clk pbb_clk = {
513 static void genclk_mode(struct clk *clk, int enabled)  in genclk_mode()  argument
517 	control = pm_readl(GCCTRL(clk->index));  in genclk_mode()
522 	pm_writel(GCCTRL(clk->index), control);  in genclk_mode()
525 static unsigned long genclk_get_rate(struct clk *clk)  in genclk_get_rate()  argument
530 	control = pm_readl(GCCTRL(clk->index));  in genclk_get_rate()
534 	return clk->parent->get_rate(clk->parent) / div;  in genclk_get_rate()
537 static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)  in genclk_set_rate()  argument
542 	parent_rate = clk->parent->get_rate(clk->parent);  in genclk_set_rate()
543 	control = pm_readl(GCCTRL(clk->index));  in genclk_set_rate()
554 	dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",  in genclk_set_rate()
555 		clk->name, rate, actual_rate);  in genclk_set_rate()
558 		pm_writel(GCCTRL(clk->index), control);  in genclk_set_rate()
563 int genclk_set_parent(struct clk *clk, struct clk *parent)  in genclk_set_parent()  argument
567 	dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",  in genclk_set_parent()
568 		clk->name, parent->name, clk->parent->name);  in genclk_set_parent()
570 	control = pm_readl(GCCTRL(clk->index));  in genclk_set_parent()
584 	pm_writel(GCCTRL(clk->index), control);  in genclk_set_parent()
585 	clk->parent = parent;  in genclk_set_parent()
590 static void __init genclk_init_parent(struct clk *clk)  in genclk_init_parent()  argument
593 	struct clk *parent;  in genclk_init_parent()
595 	BUG_ON(clk->index > 7);  in genclk_init_parent()
597 	control = pm_readl(GCCTRL(clk->index));  in genclk_init_parent()
603 	clk->parent = parent;  in genclk_init_parent()
667 static struct clk at32_pm_pclk = {
688 static struct clk ebi_clk = {
695 static struct clk hramc_clk = {
703 static struct clk sdramc_clk = {
726 static struct clk pico_clk = {
738 struct clk at32_hmatrix_clk = {
860 static struct clk atmel_psif0_pclk = {
876 static struct clk atmel_psif1_pclk = {
1273 static struct clk atmel_twi0_pclk = {
1323 static struct clk atmel_mci0_pclk = {
1475 static struct clk atmel_lcdfb0_pixclk = {
1571 static struct clk atmel_pwm0_mck = {
1733 static struct clk usba0_pclk = {
1740 static struct clk usba0_hclk = {
2030 static struct clk atmel_ac97c0_pclk = {
2114 static struct clk abdac0_pclk = {
2121 static struct clk abdac0_sample_clk = {
2178 static struct clk gclk0 = {
2186 static struct clk gclk1 = {
2194 static struct clk gclk2 = {
2202 static struct clk gclk3 = {
2210 static struct clk gclk4 = {
2219 static __initdata struct clk *init_clocks[] = {
2322 		struct clk *clk = init_clocks[i];  in setup_platform()  local
2325 		at32_clk_register(clk);  in setup_platform()
2327 		if (clk->users == 0)  in setup_platform()
2330 		if (clk->mode == &cpu_clk_mode)  in setup_platform()
2331 			cpu_mask |= 1 << clk->index;  in setup_platform()
2332 		else if (clk->mode == &hsb_clk_mode)  in setup_platform()
2333 			hsb_mask |= 1 << clk->index;  in setup_platform()
2334 		else if (clk->mode == &pba_clk_mode)  in setup_platform()
2335 			pba_mask |= 1 << clk->index;  in setup_platform()
2336 		else if (clk->mode == &pbb_clk_mode)  in setup_platform()
2337 			pbb_mask |= 1 << clk->index;  in setup_platform()